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ADS1196CPAGR Texas Instruments Low-Power, 6-Channel, 16-Bit Analog Front-End for ECG 64-TQFP 0 to 70
ADS1196CZXGT Texas Instruments Low-Power, 6-Channel, 16-Bit Analog Front-End for ECG 64-NFBGA 0 to 70
TPS61196PWPT Texas Instruments 6-String 400-mA WLED Driver with Independent PWM Dimming for Each String 28-HTSSOP -40 to 85
TPS61196PWPR Texas Instruments 6-String 400-mA WLED Driver with Independent PWM Dimming for Each String 28-HTSSOP -40 to 85
ADS1196IPAG Texas Instruments SPECIALTY ANALOG CIRCUIT, PQFP64, PLASTIC, TQFP-64
ADS1196IPAGR Texas Instruments SPECIALTY ANALOG CIRCUIT, PQFP64, PLASTIC, TQFP-64

tsd 1196

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: , Inc. Integrated Silicon Solution, Inc. ADVANCE INFORMATION Rev. 00A - 1196 SR1295LV3216 1 , 1196 SR1295LV3216 ISSI IS61LV3216 ABSOLUTE MAXIMUM RATINGS(1) Symbol VCC VTERM TSTG PT , INFORMATION Rev. 00A - 1196 SR1295LV3216 3 ISSI IS61LV3216 ® CAPACITANCE(1) Symbol , Solution, Inc. ADVANCE INFORMATION Rev. 00A - 1196 SR1295LV3216 ISSI IS61LV3216 ® AC , Solution, Inc. ADVANCE INFORMATION Rev. 00A - 1196 SR1295LV3216 5 ISSI IS61LV3216 ® WRITE Integrated Silicon Solution
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A0-A14 I/O8-I/O15
Abstract: Width 45 - 60 - ns tsd Data Setup to Write End 25 - , % tested. 4. tpwe > thzwe + tsd when OE is LOW. AC WAVEFORMS WRITE CYCLE NO. 1(1,2) (CS1 Controlled , , UB tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN tHD DATA-IN VALID , tHZWE tLZWE HIGH-Z DATA UNDEFINED tSD DIN tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE , PWE WE LB, UB tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Solution
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IS66WV51216BLL IS66WV51216ALL IS66WV51216ALL/BLL 66WV51216ALL 66WV51216BLL
Abstract: from Write End tsa Address Setup Time tpwe(4) WE Pulse Width tsd Data Setup to Write End thd Data , % tested. 4. tpwe > thzwe + tsd when OE is LOW. 45ns Min. Max. 45 - 35 - 35 - 0 - , tHA CS1 tSCS2 CS2 tAW tPWE tSA tHZWE HIGH-Z WE tLZWE DOUT DATA UNDEFINED tSD , tHZWE HIGH-Z WE tLZWE DOUT DATA UNDEFINED tSD tHD DIN DATA-IN VALID WRITE , CS2 tAW tPWE tSA tHZWE HIGH-Z WE tLZWE DOUT DATA UNDEFINED tSD tHD DIN Integrated Silicon Solution
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IS62WV10248DALL/BLL IS65WV10248DALL/BLL 62/65WV10248DALL 62/65WV10248DBLL IS62WV10248DALL/ IS62WV10248DBLL
Abstract: '" 60 â'" ns WE Pulse Width 35 â'" 40 â'" 50 â'" ns tSD tHD Data , steady-state voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is LOW. AC WAVEFORMS WRITE CYCLE NO , tPWE WE tPWB LB, UB tSA DOUT tHZWE DATA UNDEFINED tLZWE HIGH-Z tSD DIN , CS2 tAW t PWE WE LB, UB tSA DOUT tHZWE tLZWE HIGH-Z DATA UNDEFINED tSD DIN , UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Solution, Inc. â'" www.issi.com â Integrated Silicon Solution
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IS62WV51216ALL IS62WV51216BLL IS62WV51216ALL/ 62WV51216ALL 62WV51216BLL
Abstract: tSD tHD Data Setup to Write End 20 - 25 - 30 - ns Data Hold from Write , ±500 mV from steady-state voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is LOW. AC , tSD DIN tHD DATA-IN VALID Notes: 1. WRITE is an internally generated signal asserted , DATA UNDEFINED tSD DIN tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE Controlled: OE is LOW , tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Solution Integrated Silicon Solution
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IS62WV51216BLL-55TI 62wv51216 IS62WV51216BLL-70T
Abstract: 0 - ns Symbol tWC 35 ns Min. Max. Unit tPWE tSD WE Pulse Width 18 , voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is LOW. AC WAVEFORMS WRITE CYCLE NO. 1 (CS1 , tSA DOUT tHZWE DATA UNDEFINED tLZWE HIGH-Z tSD DIN 10 tHD DATA-IN VALID , UNDEFINED tSD DIN tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write , UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Solution, Inc. - www.issi.com - Integrated Silicon Solution
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IS62WV20488ALL IS62WV20488BLL IS62WV20488BLL-25TLI IS62WV20488BLL-25TI IS62WV20488BLL-25MI IS62WV20488BLL-25MLI IS62WV20488ALL/BLL A0-A20
Abstract: Write End (3) Address Setup Time to Write End tsd thd thzwe tlzwe(3) Notes: WE LOW , 2. Transition is measured ±100 mV from steady-state voltage. Not 100% tested. 4. tpwe > thzwe + tsd , DATA UNDEFINED tSD tHD DIN DATA-IN VALID Notes: 1. WRITE is an internally generated , tSCS2 CS2 tAW t PWE WE LB, UB tSA tHZWE HIGH-Z tLZWE DOUT DATA UNDEFINED tSD , DOUT DATA UNDEFINED tSD tHD DIN DATA-IN VALID Integrated Silicon Solution, Inc. - Integrated Silicon Solution
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A0-A18
Abstract: '" 0 â'" ns Symbol tWC 35 ns Min. Max. Unit tPWE tSD WE Pulse Width 18 , steady-state voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is LOW. AC WAVEFORMS WRITE CYCLE NO , tPWE WE tSA DOUT tHZWE DATA UNDEFINED tLZWE HIGH-Z tSD DIN 10 tHD , tHZWE tLZWE HIGH-Z DATA UNDEFINED tSD DIN tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE , WE tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Integrated Silicon Solution
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Abstract: Address Setup Time to Write End tHA tSA tPWE tSD (4) Address Hold from Write End Address Setup Time WE , . Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is , tHA CS1 tSCS2 CS2 tAW tPWE tSA tHZWE HIGH-Z WE tLZWE DOUT DATA UNDEFINED tSD , tAW tPWE tSA tHZWE HIGH-Z WE tLZWE DOUT DATA UNDEFINED tSD tHD DIN DATA-IN , tHA CS1 tSCS2 CS2 tAW tPWE tSA tHZWE HIGH-Z WE tLZWE DOUT DATA UNDEFINED tSD Integrated Silicon Solution
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Abstract: '" 60 â'" ns WE Pulse Width 35 â'" 40 â'" 50 â'" ns tSD tHD Data , steady-state voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is LOW. AC WAVEFORMS WRITE CYCLE NO , tPWE WE tPWB LB, UB tSA DOUT tHZWE DATA UNDEFINED tLZWE HIGH-Z tSD DIN , CS2 tAW t PWE WE LB, UB tSA DOUT tHZWE tLZWE HIGH-Z DATA UNDEFINED tSD DIN , UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Solution, Inc. â'" www.issi.com â Integrated Silicon Solution
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Abstract: '" 45 â'" 60 â'" ns WE Pulse Width 35 â'" 40 â'" 50 â'" ns tSD , ±500 mV from steady-state voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is LOW. AC WAVEFORMS , CS2 tAW tPWE WE tPWB LB, UB tSA DOUT tHZWE DATA UNDEFINED tLZWE HIGH-Z tSD , tSD DIN tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle , DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Solution, Inc. â Integrated Silicon Solution
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Abstract: 5 â'" 5 â'" ns Symbol tWC tPWE tSD (4) 35 ns Min. Max. Unit , ±500 mV from steady-state voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is LOW. AC WAVEFORMS , CS2 tAW tPWE WE tSA DOUT tHZWE DATA UNDEFINED tLZWE HIGH-Z tSD DIN 10 , DOUT tHZWE tLZWE HIGH-Z DATA UNDEFINED tSD DIN tHD DATA-IN VALID WRITE CYCLE , CS2 tAW tPWE WE tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Solution
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Abstract: 0 - ns Symbol tWC 35 ns Min. Max. Unit tPWE tSD WE Pulse Width 18 , voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is LOW. AC WAVEFORMS WRITE CYCLE NO. 1 (CS1 , tSA DOUT tHZWE DATA UNDEFINED tLZWE HIGH-Z tSD DIN 10 tHD DATA-IN VALID , tLZWE HIGH-Z DATA UNDEFINED tSD DIN tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE , WE tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Integrated Silicon Solution
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0031B 0395
Abstract: Width 45 - 60 - ns tsd Data Setup to Write End 25 - , % tested. 4. tpwe > thzwe + tsd when OE is LOW. AC WAVEFORMS WRITE CYCLE NO. 1(1,2) (CS1 Controlled , , UB tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN tHD DATA-IN VALID , tHZWE tLZWE HIGH-Z DATA UNDEFINED tSD DIN tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE , PWE WE LB, UB tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Solution
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IS66WV25616ALL IS66WV25616BLL-55TLI IS66WV25616BLL IS66WV25616ALL/BLL 66WV25616ALL 66WV25616BLL
Abstract: 40 - 50 - ns tSD tHD Data Setup to Write End 20 - 25 - 30 - , measured ±500 mV from steady-state voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is LOW. AC , tSD DIN tHD DATA-IN VALID Notes: 1. WRITE is an internally generated signal asserted , DATA UNDEFINED tSD DIN tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE Controlled: OE is LOW , tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Solution Integrated Silicon Solution
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IS62WV51216BLL-55TLI IS62WV51216BLL-55BLI is62wv51216bll55tli
Abstract: - 50 - ns tSD tHD Data Setup to Write End 20 - 25 - 30 - ns , measured ±500 mV from steady-state voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is LOW. AC , tSD DIN tHD DATA-IN VALID Notes: 1. WRITE is an internally generated signal asserted , tSD DIN tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle , DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN Integrated Silicon Solution, Inc. - Integrated Silicon Solution
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Abstract: Address Setup Time tpwb LB, UB Valid to End of Write (4) tpwe WE Pulse Width tsd Data Setup to Write , voltage. Not 100% tested. 4. tpwe > thzwe + tsd when OE is LOW. 45ns Min. Max. 45 - 35 - , tHZWE tPWB tLZWE HIGH-Z DOUT DATA UNDEFINED tSD tHD DIN DATA-IN VALID Notes , HIGH-Z tLZWE DOUT DATA UNDEFINED tSD tHD DIN DATA-IN VALID WRITE CYCLE NO. 3 (WE , WE LB, UB tSA tHZWE HIGH-Z tLZWE DOUT DATA UNDEFINED tSD tHD DIN DATA-IN Integrated Silicon Solution
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IS62C51216AL-45TLI IS62C51216AL IS65C51216AL
Abstract: Write End (3) Address Setup Time to Write End tsd thd thzwe tlzwe(3) Notes: WE LOW , 2. Transition is measured ±100 mV from steady-state voltage. Not 100% tested. 4. tpwe > thzwe + tsd , DATA UNDEFINED tSD tHD DIN DATA-IN VALID Notes: 1. WRITE is an internally generated , tSCS2 CS2 tAW t PWE WE LB, UB tSA tHZWE HIGH-Z tLZWE DOUT DATA UNDEFINED tSD , DOUT DATA UNDEFINED tSD tHD DIN DATA-IN VALID Integrated Silicon Solution, Inc. - Integrated Silicon Solution
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Abstract: ® tWC tSCS1/tSCS2 CS1/CS2 to Write End tAW Address Setup Time to Write End tHA tSA tPWB tPWE tSD tHD , tSA tHZWE tPWB tLZWE HIGH-Z DOUT DATA UNDEFINED tSD tHD DIN DATA-IN VALID , tAW WE LB, UB tSA tHZWE t PWE tLZWE HIGH-Z DOUT DATA UNDEFINED tSD tHD DIN , tAW t PWE tHZWE HIGH-Z tLZWE DOUT DATA UNDEFINED tSD tHD DIN DATA-IN VALID , 10.03 10.29 0.395 0.405 11.56 11.96 0.455 0.471 0.80 BSC 0.032 BSC 0.41 0.60 0.016 0.024 0.81 REF 0.032 Integrated Silicon Solution
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IS65WV12816ALL IS65WV12816BLL 65WV12816ALL 65WV12816BLL IS65WV12816ALL/
Abstract: Pulse Width 35 - 40 - ns tSD tHD Data Setup to Write End 20 - 25 - , DATA UNDEFINED tLZWE HIGH-Z tSD DIN tHD DATA-IN VALID Notes: 1. WRITE is an , tLZWE HIGH-Z DATA UNDEFINED tSD DIN tHD DATA-IN VALID WRITE CYCLE NO. 3 (WE , PWE WE LB, UB tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN DATA-IN , 0.012 0.020 0.12 0.21 0.005 0.008 20.82 21.08 0.820 0.830 10.03 10.29 0.391 0.400 11.56 11.96 Integrated Silicon Solution
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IS62WV6416ALL IS62WV6416BLL 62WV6416BLL IS62WV6416ALL/ 62WV6416ALL
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