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Part Manufacturer Description PDF & SAMPLES
LTC3207EUF-1#PBF Linear Technology LTC3207 - 600mA Universal Multi-Output LED/CAM Driver; Package: QFN; Pins: 24; Temperature Range: -40°C to 85°C
LTC3207EUF-1#TRPBF Linear Technology LTC3207 - 600mA Universal Multi-Output LED/CAM Driver; Package: QFN; Pins: 24; Temperature Range: -40°C to 85°C
LTC3207EUF#PBF Linear Technology LTC3207 - 600mA Universal Multi-Output LED/CAM Driver; Package: QFN; Pins: 24; Temperature Range: -40°C to 85°C
LTC3207EUF#TRPBF Linear Technology LTC3207 - 600mA Universal Multi-Output LED/CAM Driver; Package: QFN; Pins: 24; Temperature Range: -40°C to 85°C
LTC3210EUD-1#TRPBF Linear Technology LTC3210-1 - MAIN/CAM LED Controller with 64-Step Brightness Control in 3mm x 3mm QFN; Package: QFN; Pins: 16; Temperature Range: -40°C to 85°C
LTC3210EUD-2 Linear Technology LTC3210-2/LTC3210-3 - MAIN/CAM LED Controllers with 32-Step Brightness Control in 3mm x 3mm QFN; Package: QFN; Pins: 16; Temperature Range: -40°C to 85°C

netlogic CAM

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: CAM enables accelerated data searches to be performed in a storage array. CAM is well suited for many , application. Smaller CAM applications are configurable in Virtex devices through the use of internal SRL shift registers, True Dual-PortTM block RAM, and distributed RAM. For larger-scale CAM applications , interface to external CAM designs. CAM Definition CAM is designed to enhance data retrieval speed from , RAM, the data is supplied as an input to locate the address, as shown in Figure 1. CAM determines if Xilinx
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VTT001 NetLogic ternary content addressable memory ternary netlogic NetLogic Ternary Content Addressable XAPP201 XAPP202 XAPP203 XAPP204 XAPP242
Abstract: Ethernet, Gigabit Ethernet, and ATM switches. · · · · · Match Flag times: 18/21/28 ns CAM Index output (flow through mode): 21/25/33 ns CAM Index output (pipelined mode): 10/12/16 ns Sustained , Register Global Mask Registers 0, 1, 2 & 3 64 Memory Configuration Register 64 4K x 64 CAM , Description 2.1 Clock (CLK): This is a free running clock that is used to time all transactions on the CAM , all CAM words to empty, initialize the control logic, and clear all registers. The reset operation Netlogic Microsystems
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NL84620
Abstract: · · · · · · 1K or 2K x 64 CAM architecture with 16-bit I/O interface Dual configuration , 0 I/O Buffers 16 /W Single cycle reset for the Segment Control Register Flexible CAM/RAM , Counters Control Register Status Register & Address Decoder CAM Array 1K x 64 2K x 64 , presented to the CAM and compared with the contents of the memory. The CAM then searches the entire , the location where the data resides in the CAM memory. The NL8X480A's 64-bit wide CAM array can be Netlogic Microsystems
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Content Addressable Memory 01AEH Priority Encoder CAM 0127H NetLogic Microsystems NL81480A NL82480A I/O15 I/O15-0 44-PIN
Abstract: store a "don't care" state for compare operations (in addition to `0' and `1') making it a Ternary CAM. The Ternary nature of this CAM is ideal for enabling policy enforcement and packet classification for , · 1K x 128 Synchronous Ternary CAM Architecture 1K x 128 Local Mask Words allow masking of each CAM word on a bit by bit basis. Match Flag times: 18/22 ns CAM Index output (pipelined mode): 10/12 , Package 127 0 64 Global M ask Registers 0 & 1 32 128 Status Register CAM W ord Netlogic Microsystems
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NL82721R NL82721 Ternary CAM RBUS12 ipCAM 292-P NL82721R-33 NL82721R-40
Abstract: store a "don't care" state for compare operations (in addition to `0' and `1') making it a Ternary CAM. The Ternary nature of this CAM is useful for storing subnet masks, implementing policy based routing , Synchronous Ternary CAM Architecture 1K x 128 Local Mask Words allow masking of each CAM word on a bit by bit basis. Match Flag times: 18/22 ns CAM Index output (pipelined mode): 10/12 ns Depth-expansion , Comparand Register 1K x 128 CAM Array 64 M UX Comparand Bus CBUS 1K x 128 M ask Array CAM Netlogic Microsystems
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counter up/down netlogic cam memory
Abstract: SDRAM CFP 1032 CAM PCI PCI 32 PCI 32 PCI 64 PCI 64 PCI32 Nios PCI-X 32 PCI 32 PCI , . Eureka Technology Inc. Eureka Technology Inc. NetLogic Microsystems, Inc. Altera Corporation Altera Altera
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qpsk simulink matlab 16 QAM modulation matlab code Ncomm OFDM Matlab code lx5280 CRC matlab AMPP15 SG85DY
Abstract: uart16450 PLD-10 SDRAM CFP 1032 CAM PCI PCI 32 PCI 32 PCI 64 PCI 64 PCI32 Nios PCI-X 32 PCI 32 PCI , . Eureka Technology Inc. Eureka Technology Inc. NetLogic Microsystems, Inc. Altera Corporation Altera Altera
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CZ80PIO uart 8250 OFDM DSP Builder lEXRA lx5280 OC192 EP20K300E
Abstract: CAM Index output (pipeline mode): 14/16 ns Sustained searches of up to 33 Million/Second Separate , Registers for easy masking of compare or write operations in each CAM 14-bit instruction bus enables , /MMF /MFDO CSCDO Reset (/RST) Clock (CLK) /MFUI CAM_0 (Highest Priority) Chip , (/SMF, /FF, /MMF) reflect the states of the entire cascaded CAM array. VDD Figure 1 NLM8x620R , Register 0 (SR0) 64 4K x 64 CAM Array 4K x 1 Validity Bit 64 MUX Comparand Bus CBUS 0 Netlogic Microsystems
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NL84620R NFA 220 NLM84620R-33 NLM84620R-25 NLM85620R-33 NLM85620R-25 NLM86620R-33
Abstract: it a Ternary CAM. The Ternary nature of this CAM is useful for storing subnet masks, implementing , · x 128 Synchronous Ternary CAM Architecture x 128 Local Mask Words allow masking of each CAM word on a bit by bit basis. Match Flag times: 25/28 ns CAM Index output (pipeline mode): 14/16 ns , System Match Flag (/SMF) Word Enables (/WEN_0,1,2,3) CAM_0 (Highest Priority) /FFI /MFUI , ) reflect the states of the entire cascaded CAM array. VDD Figure 1 NLM8x721R Module Block Diagram Netlogic Microsystems
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nfa 102 ipCAM ethernet module NLM82721R-33 NLM82721R-25 NLM84721R-25 NLM84721R-33
Abstract: it a Ternary CAM. The Ternary nature of this CAM is ideal for enabling policy enforcement and packet , . Features · · · · · · x 128 Synchronous Ternary CAM Architecture x 128 Local Mask Words allow masking of each CAM word on a bit by bit basis. Match Flag times: 25/28 ns CAM Index output (pipeline , ] /MFUO GND System Match Flag (/SMF) Word Enables (/WEN_0,1,2,3) CAM_0 (Highest Priority , , /FF, /MMF) reflect the states of the entire cascaded CAM array. VDD Figure 1 NLM8x721R Module Netlogic Microsystems
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NLM83721R-25 NLM83721R-33
Abstract: reduced version of the full-featured NL84620 device. · · · · · Match Flag times: 18/22 ns CAM , Registers 0, 1, 2 & 3 32 Status Register 0 (SR0) 0 64 4K x 64 CAM Array 64 RBUS Results , all transactions on the CAM. The rising edge of the clock is the timing reference. A , minimum of three (3) cycles. This will set all CAM words to empty, initialize the control logic, and , into the CAM at the next free address (NFA) using the "Write to memory at NFA" instruction provided Netlogic Microsystems
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CBUS30 NL84620R-40
Abstract: reduced version of the full-featured NL84620 device. · · · · · Match Flag times: 18/22 ns CAM , Registers 0, 1, 2 & 3 32 Status Register 0 (SR0) 0 64 4K x 64 CAM Array 64 RBUS Results , all transactions on the CAM. The rising edge of the clock is the timing reference. A , minimum of three (3) cycles. This will set all CAM words to empty, initialize the control logic, and , into the CAM at the next free address (NFA) using the "Write to memory at NFA" instruction provided Netlogic Microsystems
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CBUS43 NL84620R-33
Abstract: " state for compare operations (in addition to `0' and `1') making it a Ternary CAM. This Ternary CAM is , Synchronous Ternary CAM Architecture 1K x 128 Local Mask Words allow masking of each CAM word on a bit by bit basis. Single cycle "Learn" instruction for easy table updates Match Flag times: 18/22 ns CAM Index output (flow through mode): 21/25 ns CAM Index output (pipelined mode): 10/12 ns Depth-expansion , Validity Bits 64 128 Comparand Register Global M ask Registers 0 & 1 1K x 128 CAM Array 64 Netlogic Microsystems
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mcr 72 hpm 06 NFA 222 CBUS63-CBUS0 nfa 223 1kx12
Abstract: " state for compare operations (in addition to `0' and `1') making it a Ternary CAM. This device is ideal , Synchronous Ternary CAM Architecture 1K x 128 Local Mask Words allow masking of each CAM word on a bit by bit basis. Single cycle "Learn" instruction for easy table updates Match Flag times: 18/22 ns CAM Index output (flow through mode): 21/25 ns CAM Index output (pipelined mode): 10/12 ns Depth-expansion , 64 128 Comparand Register Global M ask Registers 0 & 1 1K x 128 CAM Array 64 M UX Netlogic Microsystems
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Select 642 UX NL82721-33 NL82721-40
Abstract: instruction for easy table update Match Flag times: 18/21 ns CAM Index output (flow through mode): 21/25 ns CAM Index output (pipelined mode): 10/12 ns Sustained searches of up to 40 Million/Second Separate , 64 Memory Configuration Register 64 4K x 64 CAM Array Data Translation Register Status , ): This is a free running clock that is used to time all transactions on the CAM. The rising edge of the , all CAM words to empty, initialize the control logic, and clear all registers. The reset operation Netlogic Microsystems
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Abstract: Controller CFP1032 CAM Controller PCI Compiler, 32-bit Master/Target PCI Compiler, 32-bit Target PCI Compiler , Altera Corporation Eureka Technology Inc. Eureka Technology Inc. Eureka Technology Inc. NetLogic Altera
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soft 16 QAM modulation matlab code ofdm modem simulink GSM 900 simulink matlab matlab code for audio equalizer wireless power transfer matlab simulink embedded powerpc 460