Direct from the Manufacturer

Part Manufacturer Description PDF & SAMPLES
SN74LS245DW Texas Instruments Octal bus transceivers 20-SOIC 0 to 70
SN74LS245DWG4 Texas Instruments Octal bus transceivers 20-SOIC 0 to 70
SN74LS245DWR Texas Instruments Octal bus transceivers 20-SOIC 0 to 70
SN74LS245N Texas Instruments Octal bus transceivers 20-PDIP 0 to 70

ic 74ls245

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: U328-331 IC, 7406 HEX INVERTER IC, 74LS155 IC, 74LS245 DEMULTIPLEXER BUS XCVR RESISTOR, 220 OHM , pin IC IC, 74LS02 74LS374 74LSI55 74LS245 10052 -314 U3I6 U 3I8-U 3 2 I 11323,11329 U324-U327 Pi , .T - IM n i'c t A -: ^ fiV r , f ; g /r u, 2 v ei ? ! * * 1 2 AW 1 4 - SEE , , 470PF, 50V CAP, ELECT, 33MFD, 10V DIPT CAP, CERAM, 27PF, 50V CAP, CERAM, 56PF, 50V PCB , MA IN LOG IC , ') 4W $ m ) fiiTIKET I I b - RAM APPLIED MICROSYSTEMS cor* SC HEM ATIC - PCB, M A IN LOG,IC D -
OCR Scan
4040 cmos transistor 2N 3055 IC 74ls244 ic 2114 diode S3L 7d ls y201 EM-180/180B EM-180 EM-180B EM-180/18OB A55Y- 8W401
Abstract: LA28-NP Driver Circuit A simple and reliable gate drive circuit based on a high-and-low side driver; an IC Freescale Semiconductor
lv28-p 36v DC MOTOR SPEED CONTROLLER schematic IR2110 INVERTER SCHEMATIC power inverter schematic diagram ir2110 Park transformation dq transformation pmsm AN3301 56F8357
Abstract: loading · Hysteresis on all Data inputs TYPE 74LS245 TYPICAL PROPAGATION DELAY 8ns TYPICAL SUPPLY , 853-0462 81500 Signetics Logic Products P roduct S pecification Transceiver 74LS245 , 74LS245 DC ELECTRICAL CHARACTERISTICS PARAMETER A V~r v OH y OL V ik 0ZH OZL 1 Iih I il (Over recommended operating free-air temperature range unless otherwise noted.) 74LS245 TEST CONDITIONS1 Min , mA mA mA mA mA los Ice Supply current4 (total) VCC = MAX Ic c l Outputs LOW leez -
OCR Scan
74LS245 buffer ic 74LS245 SIGNETICS 74LS245 interface function table of 74LS245 LS 74LS245 SOL-20 N74LS245N N74LS245D LS245 1N916 1N3064
Abstract: GD54/74LS245 OCTAL BUS TRANSCEIVER; NON-INVERTED 3-STATE OUTPUTS Feature Pin Configuration â , L H X T Y P IC A L O F A L L O U T P U T S B data to A bus A data to B bus Isolation , . - 6 5 ' C to 1 5 0 C 4-191 GD54/74LS245 Recommended Operating Conditions MIN NOM MAX , p ic a l v a lu e s a re a t V CC= 5 V , T A= 2 5 ° C . N o te 2 : N o t m o re th a n o n e , it s h o u ld n o t e x c e e d o n e s e c o n d . 4 -1 9 2 mA GD54/74LS245 Switching -
OCR Scan
Abstract: operation over the full military temperature range of -5 5 °C to 125°C. The SN 74LS245 is characterized for , .-5 5 °C to 125°C SN 74LS245 _ . 0 ° C t o 7 0 ° C , x a s I Irn sat re u m ents uC f tR DP nR oA rE vD n N O O T P O S T O P P IC I B O X S O IS · O A , page 3-11. 7.350 T e x a s I NIC n stru m en ts ORPORATED P O S T O F F IC E S O X S O IS · D A -
OCR Scan
SN74LS248 54LS246 74ls245 ic sn54ls246 SN54LS245 SH74LS245 1976-REVISEO SN64L8246 SN54LS246
Abstract: 54LS245 SN 74LS245 d e sc rip tio n These octal bus transceivers are designed for asyn chron o us tw , s h o w n o n lo g ic n o ta tio n are fo r D W , J o r N p a c k a g e s absolute maximum , 5 M AX 5 .5 -1 2 12 125 0 M IN 4 .7 5 SN 74LS245 NOM 5 M AX 5 .2 5 -1 5 24 70 U N IT V mA mA 'C , c u it o u t p u t current^ T o t a l, o u tp u ts high IC C S u p p ly c u rre n t T o t a l, o u , SN 54LS245 M IN 2 0.7 TYPt MAX M IN SN 74LS245 TYPt MAX U N IT V 2 0 .8 -1 .5 0 .2 2 .4 2 -
OCR Scan
SN74LS245 SN54LS24S
Abstract: o 4, ft ¿ 2- HS-CMOS" INTEGRATED CIRCUITS OCTAL BUS TRANSCEIVER 3-STATE DESCRIPTION The M54/74HCT245 utilize silicon gate C2MOS technology to achieve operating speed equivalent to LSTTL parts. Along with the low power dissipation and high noise immunity of standard CMOS integrated circuit, it has a fan-out of 15 LSTTL loads. This IC' is intended for two-way asynchronous communication , .) Balanced Propagation Delays tp[_H = IpHL Pin and Function compatible with 54/74LS245 TRUTH TABLE INPUT -
OCR Scan
M54HCT245 M74HCT245 74HCT245 M54HCT/74HCT 54/74LS245
Abstract: 8 -B it Buffer Transceiver SN54/74LS245 Features/ Benefits · Three-state outputs drive bus lines · Low current PN P Inputs reduce loading · Symmetric - equal driving capability In each direction · 20-pin SKINNYDIP® saves space · 8-bit data path matches byte boundaries · Ideal for microprocessor , B bus, or from the B b u s to the A b u s depending upon the log ic level at the direction control , - -B7 ID8 8 -B8 S K iN N Y D IP » is a registered trademark of M o n o lith ic Mem ories Motorola
xc68ec040* motorola SMD LD3 PAL22V10-25 P6 MOTHERBOARD SERVICE MANUAL p112 smd MCM2814 M68360QUADS-040 RS-232 PAL16R4 QUICC040EVB
Abstract: 8-Bit Buffer Transceiver MORE DETAIL SN54/74LS245 SEE Features/ Benefits T'°N Ordering Information â'¢ Three-state outputs drive bus lines â'¢ Low current PNP inputs reduce loading â'¢ Symmetric â'"equal driving capability in each direction PART NUMBER TYPE SN54LS245 J.L.W SN74LS245 N,J TEMP POWER < Ã' 5 j¿ } ) > â'¢ 20-pin SKINNYDIP® saves , loi orfromthi the direct! u: in the popular 20-pin IE E E Symbol à V i2 g ic ¿ á b o l -
OCR Scan
SN54/74LS245 SN54/74LS645 SN74LS645-1 SN54LS645 SN74LS645 LS645/645-1
Abstract: TC74HCT245AP/AF CMOS TC74HCT245AP,TC74HCT245AF Octal Bus Transceiver TC74HCT245A CMOS CMOS 8 CMOS LSTTL TTL TTL IC CPU DIR "H" A · B DIR "L" B · A G "H" A B () · TC74HCT245AP TC74HCT245AF () : tpd = 10 ns () (VCC = 5 V) · : ICC = 4 A , | = IOL = 6 mA () : tpLH - tpHL · LSTTL (74LS245) : DIP20-P-300-2.54A : 1.30 g , 41 pF : () CPD IC ICC (opr) = CPDVCCfIN + ICC/8 () 4 -
OCR Scan
Abstract: TC74HC245,640AP/AF CMOS TC74HC245AP,TC74HC245AF,TC74HC640AP,TC74HC640AF Octal Bus Transceiver TC74HC245AP/AF 3-State, Non-Inverting TC74HC640AP/AF 3-State, Inverting TC74HC245AP/640AP TC74HC245A/640A CMOS CMOS 8 CMOS LSTTL IC CPU DIR "H" A ·B DIR "L" B ·A G "H" A B , · · LSTTL (74LS245, 640) : DIP20-P-300-2.54A : 1.30 g () SOP20-P , IC ICC (opr) = CPDVCCfIN + ICC/8 () 4 2007-10-01 TC74HC245,640AP/AF : 1.30 g Toshiba
Abstract: (Ä ) MOTOROLA D E SC R IPTIO N - Th eSN 54LS/74LS245 is an Octal BusTransmitter/ Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input (DR) controls transmission of Data from bus A to bus Bor bus B to bus A depending upon its logic level. The Enable input (E , IC A T IO N IN PU T D IO D E S LIM IT H IGH -SPEED TE R M IN A TIO N EFFECTS LO W PO W ER SC H O T TK Y TRUTH T A B L E LO G IC A N D C O N N EC TIO N D IA G RA M DIP (TOP VIEW) INPUTS G L L Toshiba
HC640A hc245a TC74HC245AF/640AF TC74HC245A TC74HC640A HC245A
Abstract: HS-CMOS" INTEGRATED CIRCUITS ö a 4- Û 4r> ' C, iC ^ A . ."V 1' 4?) M54/74HC245 M54/74HCB40 M54/74HCS43 OCTAL BUS TRANSCEIVER HC245 3-STATE, NON-INVERTING HC640 3-STATE, INVERTING , capability of 15 LSTTL loads. These IC's are intended for two-way asynchronous communication between data , Wide Operating Voltage Range Vcc (opr) = 2V to 6V Pin and Function compatible with 54/74LS245/640/643 , â'" pF Note (*) CPD is defined as the value the IC's of internal equivalent capacitance which is -
OCR Scan
Abstract: A C T E R lS T IC S (T a = 0 ~ 7 0 ,C ( V cæ *= 5V ± 10% ) Limits Symbol VlH VlL VoH VOL Iu I lo , -1 0 10 10 V Vi = 0 -V c c Vo = 0 - Vcc AC ELECTRICAL C H A R A C T E R IS T IC S (T a » 0 , -State Buffer Octal 3-State Buffer (74LS244) Octal 3-State Bus Transceiver (74LS245) Octal 3-State Buffer -
OCR Scan
HC643 M54HC640 M54HC643 74hc245 ic 74hc245 ic 74hc245 n 74hc245 20 pin DIAGRAM 74hc245 PIN DIAGRAM 74HC245 application M54HCXXX M74HCXXX HC640/643
Abstract: package format. It can be ordered with any 245 type transceiver from any family of IC manufacturing , /outputs. Performance specifications and electrical characteristics are determined by the IC devices used , information is obtained from the IC vendorsâ'™ data sheets, like those attached, or from their data books , i t h 74F245 74FCT245A 74ACT245 74LS245 transceiver transceiver transceiver transceiver -
OCR Scan
RSC-20 A0I21 OR-02 MS41C m245c M-540C NAND02 DDD17DD AND04 XOR02 XNOR02
Abstract: 8-Bit Buffer Transceiver MORE DETAIL SN54/74LS245 SEESECTKJN Features/Benefits! â'¢ Three-state outputs drive bus lines â'¢ Low current PNP inputs reduce loading â'¢ Symmetric ~ equal driving capability In each direction â'¢ 20-pin SKINNYDIP® saves space â'¢ 8-bit data path matches byte boundaries â'¢ Ideal for microprocessor Interface â'¢ Pin-compatible with SN54/74LS645 - Improved speed, and , TWX: 910-338-2376 ^^//^IC RBI] 2175 Mlttlon College Blvd. Santa Clara, CA 95054-1592 Tel: (408 -
OCR Scan
Abstract:   PIN AND FUNCTION COMPATIBLE WITH 54/74LS245/640/643 ORDERING NUMBERS: M54HCTXXX F1 M74HCTXXX C1 , _ 3/6 M U f f iB S a iC W © » « » 437 I P M54/74HCT245/640/643 DC SPECIFICATIONS -
OCR Scan
74LS245 buffer LS245 IEEE 54LS
Abstract: FUNCTION COMPATIBLE WITH 54/74LS245/640/643 DESCRIPTION The M54/74HCT245, HCT640 and HCT643 utilise , capability to drive 15 LSTTL loads. These IC's are intended for two-way asynchronous communication between -
OCR Scan
M54HCT245/640/643 M74HCT245/640/643 HCT245 54/74LS245/640/643 M54/74HCT640/643
Abstract: 3] -6 "Tl 1 T\ Function c/> m 0 0 s w GO w ro O o> 0 4019B D EV IC E NO. O c -a c w , D E V IC E NO. FAIRCHILD I I Enable Inputs C D X X T , O utput Current-m A Item > U J o 1 2 54LS/74LS242 54LS/74LS243 54LS(1)/74LS245 -
OCR Scan
74HCTXXXM M74HCTXXXC1R HCT640/643 M54/M74HCT245/640/643
Showing first 20 results.