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CK-78

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: /CH78/CK78/CM78 system evaluation. The 87PM78 is pin compatible with the 87CC78/CH78/CK78/CM78. The operations possible with the 87CC78/CH78/CK78/CM78 can be performed by writing programs to PROM. The 87PM78 , pin compatible with the 87CC78/CH78/CK78/CM78 (fix the TEST pin at low level). (2) PROM mode PIN , functions of the 87PM78 are the same as those of the 87CC78/CH78/CK78/CM78, except in that a one-time PROM , the MCU mode, operation is the same as with the 87CC78/CH78/CK78/CM78 (the TEST / VPP pin cannot be -
OCR Scan
TMP87PM78 TMP87PM78F TC57256AD QFP100-P-1420-0 MX-38T cm78 CSA4.00MG tc27256 87CC78/CH78/CK78/CM78 BM1188
Abstract: 87CC78/CH78/CK78/CM78 system evaluation. The 87PM78 is pin com patible w ith th e 87CC78/CH78/CK78/CM78. The operations possible w ith th e 87CC78/CH78/CK78/CM78 can be perform ed by w riting programs to , /CK78/CM78 (fix th e TEST pin at low level). (2) PRO M mode PIN NAME (PROM mode) A14 , of the 87CC78/CH78/CK78/CM78, except in th a t a one-time PRO M is used instead o f an on-chip mask , , operation is the same as w ith the 87CC78/CH78/CK78/CM78 (the TEST /V PP pin cannot be used open because it -
OCR Scan
TMM27256AD QFP100-P-1420A P07/D7 P06/D6 P05/D5 P04/D4
Abstract: REFSEL0 CK155 REFSEL1 Clock Divider REFSEL2 CK78 VOSC CK39 VTUNEIN CLKIN NCLKIN , CK78, and a 38.88MHz PECL clock at CK39. Note that the above clock frequencies are dependant upon , TD3(3) VEE VDD VDD CK78 VEE HCKOUT TD3(2) VEE VDD VDD CK39 CK155 , output. Must be externally terminated by RTe to VTTe. 168 M15 CK78 Output TTL 77.76 MHz , Symbol Description Min Nom Max Units CK78 LOCK TDPERR (Note 2) tckdc tckr tckf TriQuint Semiconductor
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TQ8213 76mb CK311 OC48 TQ8212 TriQuint Optoelectronics
Abstract: /CH78/CK78/CM78 system evaluation. The 87PM78 is pin compatible with the 87CC78/CH78/CK78/CM78. The operations possible with the 87CC78/CH78/CK78/CM78 can be performed by writing programs to PROM. The 87PM78 , 87CC78/CH78/CK78/CM78 (fix the TEST pin at low level). PROM mode Pin Name Pin Name In p u t/O u tp u t , /CH78/CK78/CM78, except in that a one-time PROM is used instead of an on-chip mask ROM. The 87PM78 is , /CH78/CK78/CM78 (the TEST / VPP pin cannot be used open because it has no built-in pull-down resistance -
OCR Scan
P-QFP100-1420-0 000707EBA1
Abstract: /CH78/CK78/CM78 system evaluation. The 87PM78 is pin compatible with the 87CC78/CH78/CK78/CM78. The operations possible with the 87CC78/CH78/CK78/CM78 can be performed by writing programs to PROM. The 87PM78 , pin compatible with the 87CC78/CH78/CK78/CM78 (fix the TEST pin at low level). PROM mode PIN NAME PIN , functions of the 87PM78 are the same as those of the 87CC78/CH78/CK78/CM78, except in that a one-time PROM , level. In the MCU mode, operation is the same as with the 87CC78/CH78/CK78/CM78 (the TEST / VPP pin -
OCR Scan
P03/D3 P00/D0
Abstract: MB-83 (9/16) DVP-C600D MB-83 (ROULETTE), CK-78 (CONNECTION), LM-55 (LOADING MOTOR), SE , ,000 series, CK-78, LM-55, SE-70 boards; 1,000 series ­ ROULETTE, CONNECTION, LOADING MOTOR, SENSOR MB-83 (10/16), CK-78, LM-55, SE-70 4-35 4-36 DVP-C600D MB-83 (BIAS) SCHEMATIC DIAGRAM ­ Sony
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S2LA20 CNP901 power supply DVD schematic diagram IC351 ic811 ic604 dvd drive schematic IC-303 RMT-D104A TK-48 IC006 IC005 D1N60
Abstract: DATA SHEET Functional Description (continued) MHz TTL clock at CK78, and a 38.88MHz PECL clock at , MHz clock output. Must be externally terminated by RjeQ to V-fTe- 168 M15 CK78 Output TTL , Min Norn 40 50 CK78 tckdc 78 MHz output clock duty cycle (Note 1) LOCK tckr , ) xxxxx XXXXXX Valid Data Valid Data XXX Figure 6. AC Timing: 77.76 Mb/s CK78 \ 4 , CK311 to CK78 timing relation 78 pS T c K39 CK311 to CK39 timing relation 1800 pS -
OCR Scan
OC48/STM16
Abstract: /CH78/CK78/CM78 system evaluation. The 87PM78 is pin compatible with the 87CC78/CH78/CK78/CM78. The operations possible with the 87CC78/CH78/CK78/CM78 can be performed by writing programs to PROM. The 87PM78 , mode In this mode, the 87PM78 is pin compatible with the 87CC78/CH78/CK78/CM78 (fix the TEST pin at , operation. The configuration and functions of the 87PM78 are the same as those of the 87CC78/CH78/CK78/CM78 , low level. In the MCU mode, operation is the same as with the 87CC78/CH78/CK78/CM78 (the TEST / VPP -
OCR Scan
Abstract: CK155 REFSEL1 Clock Divider REFSEL2 CK78 VOSC CK39 VCO 1 0 CLKIN NCLKIN , (continued) 311.04 MHz PECL clock at CK311, a 155.52 MHz PECL clock at CK155, a 77.76 MHz TTL clock at CK78 , CK78 VEE HCKOUT TD2(1) VEE VDD VDD CK39 CK155 NCK311 VEE VDD VDD , terminated by RTe to VTTe. 168 M15 CK78 Output TTL 77.76 MHz 77.76 MHz clock output. 167 , Signal Symbol Description Min Nom Max Units CK78 LOCK tckdc tckr tckf Voh TriQuint Semiconductor
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TQ8214 optical external modulator NTD10 TD10 td10 1400
Abstract: Figure clock at CK155, a 77.76 MHz TTL clock at CK78, and a 5. 38.88MHz PECL clock at CK39. Note , be externally terminated by RjeQ to V-fTe- 168 M15 CK78 Output TTL 77.76 MHz 77.76 , Specifications Signal Symbol Description Min Norn Max CK78 tckdc 78 MHz output clock , Units T c K155 CK311 to CK155 timing relation 500 pS T c K78 CK311 to CK78 timing -
OCR Scan
OO000
Abstract: 1 CK155 Clock Divider CK78T 0 NCLKIN CLKIN CK39 CLKSEL 2.48832GHz Active , 155.52MHz PECL clock at CK155, a 77.76 MHz TTL clock at CK78T, and a 38.88 MHz PECL clock at CK39. Note , IOVEE IOVDD VDD VDD VDD IOVEE VTUNEO IOVDD CK78T VEE HCKOUT VDD CK39 , CK155 Output PECL 155.52 MHz 155.52 MHz clock output. 168 M15 CK78T Output TTL 77.76 , Nom Max Units CK78T tckdc tckr tckf Voh Vol Cload Output clock duty cycle (Note 3 TriQuint Semiconductor
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TQ8223 RQ48 rq31 RQ23 RQ-15 resistor 40-1-88 CK38
Abstract: 8bit A/D CM 64 A/D+VFT CM75* PM75 CK78 CM78 PM78 CCD ; Closed Caption -
OCR Scan
87C409N 87C808N 87CH46N 87CM23F 87CP71F 87cm14n 87CK38N 87c408n TLCS-870 87C800N DIP64-P-750-1 87PH00N 87C800F FP64-P-1420-1
Abstract: Selector VTUNE VCO 1 CK155 Clock Divider CK78T 0 NCLKIN CLKIN CK39 CLKSEL , PECL clock at CK311 and NCK311, a 155.52MHz PECL clock at CK155, a 77.76 MHz TTL clocks at CK78T, and , IOVEE IOVDD VDD VDD VDD IOVDD CK78T VEE HCKOUT VDD CK39 CK155 NCK311 , M15 CK78T Output TTL 77.76 MHz 77.76 MHz clock output. 167 N15 CK39 Output PECL , . TTL Interface Specifications Signal Symbol Description Min Nom Max Units CK78T TriQuint Semiconductor
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TQ8224 2488-32 NRQ27 40188
Abstract: TMP87CC78/CH78/CK78/CM78F, a pull-down resistor (Rk = 80 kn typ.) can be built into a VFT driver using mask -
OCR Scan
TMP87CC78F TMP87CH78F TMP87CK78F TMP87CM78F 87cm78 P-QFP100-1420- P87CC78/H 78/K78/M
Abstract: CK4X CK78 D2 WCLK D2 RE CC8RE SCLK RA[7:0] Q[7:0] RE SCLK WEA ENA Xilinx
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XAPP233 XAPP230 XAPP232 CAT16-LV4F12 CAT16-PT4F4 cc8cled X23310
Abstract: > > > > > 500 . Resistive Tap â  * CK311 â  * NCK311 â  * CK155 -⺠CK78T -⺠CK39 -> HCKOUT , 77.76 MHz TTL clocks at CK78T, and Ghz clock. The re-timed serial data stream is then 1:16 a 38.88 , Output PECL 155.52 MHz 155.52 MHz clock output. 168 M15 CK78T Output TTL 77.76 MHz , Description Min Norn Max CK78T tckdc Output clock duty cycle (Note 1) 40 50 60 % , Typ T c K155 CK311 to CK155 timing relation 225 pS T c K78 CK311 to CK78 timing -
OCR Scan
Abstract: clock at CK311 and NCK311, a 155.52MHz PECL clock at CK155, a 77.76 MHz TTL clock at CK78T, and a , clock output. 168 M15 CK78T Output TTL 77.76 MHz 77.76 MHz clock output. 167 N15 , Specifications Signal CK78T Symbol Description Min Norn 40 50 Max Units tckdc , .See Figure 6. Tpd1 and Tpd2 are specified relative to the falling, edge of the CK78T signal. Output data edge , CK311 to CK78 timing relation 1400 pS T c K39 CK311 to CK39 timing relation 700 pS -
OCR Scan
Abstract: Typ T c K155 CK311 to CK155 timing relation 225 pS T c K78 CK311 to CK78 timing Agere Systems
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CK51 TSYN03622 OC-12 TSWC01622 TSWC03622/TSYN03622 TSWC01622/TSYN01622 TDAT04622/
Abstract: CK311 to CK78 timing relation 1400 pS T c K39 CK311 to CK39 timing relation 700 pS Agere Systems
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TSWC01622/TSWC02622/TSWC03622/TSYN01622 DS02-237HSPL TSWC02622 DS02-238HSPL TSWC03622 DS02-308HSPL
Abstract: PRELIMINARY DATA SHEET Figure 7. Output Clock Timing Relationships CK311 TCK155 CK155 TCK78 CK78 , TCK78 TCK39 CK311 to CK155 timing relation 230 pS CK311 to CK78 timing relation 1400 Agere Systems
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T400 clock PDH/SDH TSI-16 TMXF84622 TMXF28155 TDAT04622 DS03-120HSPL
Abstract: Timing Relationships CK311 TCK155 CK155 TCK78 CK78 TCK39 CK39 Table 14. Output Clock Timing , pS CK311 to CK78 timing relation 1400 pS CK311 to CK39 timing relation 770 pS 16 -
OCR Scan
MIL-C-11015 M15733/28-0001 M15733/28-0002 M15733/28-0003 M15733/33-0001 M15733/33-0002
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