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"dummy load"

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Abstract: register DO/I DA0 to 5 DB0 to 5 DC0 to 5 Sampling register LOAD Load register Control circuit , SB80 SC80 2 2001-08-24 JBT6L77-AS JBT6L77-AS PAD Layout Chip size: 1.56 × 13.28 (mm) X (+) DUMMY SB80 SC80 SA80 Output pad 240, 50 um pitch, two-step zigzag allocation SC1 SB1 SA1 DUMMY Y (+) DUMMY DUMMY DUMMY Chip center (0,0) 11 DUMMY DUMMY DUMMY VSS AVDD Alignment mark 6 6 DB2 DA0 VSS DA2 DA4 DB0 DB4 V0 DC1 DO/I TESTB V10 V8 DC3 DC5 CPH V2 V4 V6 TEG DA1 DI/O DA3 DA5 DB3 DB1 DB5 DC0 LOAD DVDD V9 ... Toshiba
Original
datasheet

21 pages,
334.54 Kb

SB-24 DA 606 JBT6L77-AS TEXT
datasheet frame
Abstract: to DA5 DB0 to DB5 Sampling register DC0 to DC5 LOAD Load register Control circuit , ) X (+) DUMMY SC1 SB80 SC80 SA80 DUMMY SA1 SB1 Output pad 240, 50 mm pitch, two-step zigzag allocation DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY Chip center (0,0) 11 11 DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY VSS DC5 DC3 DC1 CPH DO/I TESTB V10 V8 V6 V4 V2 V0 DB4 DB2 DB0 DA4 DA2 DA0 TEG VSS TEG DC4 DC2 DC0 U/D LOAD DVDD V9 V7 ... Toshiba
Original
datasheet

20 pages,
218.2 Kb

toshiba sa30 JBT6L77-AS JBT6L78-AS SA10 SA11 SA80 SB75 SC10 SC80 61175 TEXT
datasheet frame
Abstract: DB5 Sampling register DC0 to DC5 LOAD Load register Control circuit block V0 to V10 , 2001-12-18 JBT6L77-AS JBT6L77-AS PAD Layout Y (+) Chip size: 1.56 × 13.28 (mm) X (+) DUMMY SC1 SB80 SC80 SA80 SA1 DUMMY SB1 Output pad 240, 50 um pitch, two-step zigzag allocation DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY Chip center (0,0) 11 11 DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DB2 DA0 VSS DA2 DA4 DB0 DB4 V0 DO/I TESTB V10 V8 DC1 DC3 DC5 CPH ... Toshiba
Original
datasheet

20 pages,
307 Kb

toshiba sa30 42760 61175 JBT6L77-AS JBT6L78-AS SA10 SA11 32240 lcd SB-28 SB68 SC10 sc78 SC80 SA80 TEXT
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Abstract: (); enableIrq(); /* Dummy idle counter */ /* /* /* /* /* Initialize exceptions: only need to load , Measurement Step Code 1 Initialize Time Base = 0 li mttbu mttbl r4, 0 r4 r4 # Load , mfhid0 li or mthido r5 r4, 0x4000 r5, r4, r5 r5 # Move from spr HID0 to r5 # Load immediate , r5, r4, r5 # r5 # # r4, 0 r4 r4 INITIALIZE TIME BASE=0 Load immediate data of 0 to r4 Move r4 to TBU Move r4 to TBL ENABLE TIME BASE Move from spr HID0 to r5 (copies HID0) Load immed. data ... Freescale Semiconductor
Original
datasheet

64 pages,
695.2 Kb

IVOR10Handler GPDO205 GPDI205 POWERPC E500 MPC5554 GPR11 dummy mtivor10 MPC5554 evb mpc5554 emios mpc5500 IVOR1016 IVOR11Handler MPC5554 instruction set AN2865 emios AN2865 mtivor4 AN2865 DR-B 2003 AN2865 mtivpr AN2865 AN2865 AN2865 TEXT
datasheet frame
Abstract: material shall be used which will enable the dummy load to meet the performance requirements of this , permitted to compensate for discontinuities of the dummy load by the design of the mating connector. 5 , connectors. Printed circuit connectors for a specific dummy load shall conform to MIL-DTL-55302 MIL-DTL-55302 as , connections for a specific dummy load shall be as specified (see 3.1). 3.4.1.4 Connection caps. All coaxial , foreign material during storage. These caps will be supplied with the dummy load. 3.4.1.5 Connection ... DEPARTMENT OF DEFENSE
Original
datasheet

19 pages,
155.79 Kb

MIL-DTL-24044 EIA-557 MIL-STD-889 astm B733 B455 MIL-C-3650 MIL-DTL-5541 MIL-H-28719 astm b733 - 04 ASTM a240 SAE-AMS-QQ-A-250 B-455 ASTM B455 astm B221 MIL-DTL-39030E MIL-DTL-39030E IEEE-STD-287 MIL-DTL-39030E MIL-DTL-39030E MIL-DTL-14072 MIL-DTL-39030E MIL-DTL-39030E D4895 MIL-DTL-39030E MIL-DTL-39030E MIL-C-25516 MIL-DTL-39030E MIL-DTL-39030E ASTM A693 MIL-DTL-39030E MIL-DTL-39030E MIL-DTL-39030E MIL-DTL-39030E MIL-DTL-39030E TEXT
datasheet frame
Abstract: 160-Bit Latch3 160-Bit Latch2 160-Bit Latch1 LATCH SELECTOR 160 I2C LOAD DATASDA , 100 - - ns CLOCK tLC 100 - - ns LOAD tWLD 100 - - ns LOAD - - (*2) ns LOAD-CLOCK LOAD tr,tsf CLOCK,DATA, LOAD *2tsr , V IL VIL VIL 1/f CP2 tCL tWLD t sr tLC t sf VIH VIH LOAD VIL VIL , 105-108 I2C I 36-40 DATA SDA) I 41-45 CLOCK SCL) I 46-50 LOAD I ... OKI Electric Industry
Original
datasheet

29 pages,
486.54 Kb

29572 3121 4164-2 640-Bit D157 D158 D159 D160 1085Hz tlc 1125 T4200 SEG80 ML9479B M72 7 segment sda 2087 N FJDL9479B-01 ML9479B D83 x 329 FJDL9479B-01 ML9479B FJDL9479B-01 FJDL9479B-01 ML9479B A 3121 IC TEXT
datasheet frame
Abstract: 133-3901-806 3 Jack to Bulkhead Jack Adapter 3 Jack to Jack Adapter 3 Plug Dummy Load 3 Specifications 2 , Rating (Dummy Load): 0.5 watt @ +25oC, derated to 0.25 watt @ +125o C MECHANICAL RATINGS Engagement , 133-3901-401 NICKEL PLATED 133-3901-406 Plug Dummy Load NEW FREQ. RANGE 0-1 GHz 0-1 GHz GOLD , Range: Connectors . 0-6 GHz Dummy loads , . 1.13 + .04f Uncabled receptacles, Dummy loads . N/A ... Burgess
Original
datasheet

3 pages,
87.92 Kb

TEXT
datasheet frame
Abstract: 133-3901-806 3 Jack to Bulkhead Jack Adapter 3 Jack to Jack Adapter 3 Plug Dummy Load 3 Specifications 2 , Rating (Dummy Load): 0.5 watt @ +25oC, derated to 0.25 watt @ +125o C MECHANICAL RATINGS Engagement , 133-3901-401 NICKEL PLATED 133-3901-406 Plug Dummy Load NEW FREQ. RANGE 0-1 GHz 0-1 GHz GOLD , Range: Connectors . 0-6 GHz Dummy loads , . 1.13 + .04f Uncabled receptacles, Dummy loads . N/A ... Burgess
Original
datasheet

3 pages,
99.19 Kb

TEXT
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Abstract: 3 Jack to Jack 3 Jack to Jack to Jack 4 Plug Dummy Load - 50 Ohm and 75 Ohm 4 Plug to Bulkhead Jack , . N/A Power Rating (Dummy Load): 0.5 watt @ +25oC, derated to 0.25 watt @ +125o C MECHANICAL RATINGS , PLATED 131-3901-906 Plug Dummy Load - 50 Ohm and 75 Ohm FREQ. RANGE 0-1 GHz 0-1 GHz GOLD PLATED , . 0-4 GHz Dummy loads . 0-1 GHz VSWR: (f = GHz , . 1.20 + .04f Uncabled receptacles, dummy loads ... Burgess
Original
datasheet

4 pages,
122.66 Kb

TEXT
datasheet frame
Abstract: -Bit Latch1 LATCH SELECTOR 80 I2C LOAD DATASDA CLOCKSCL Command Decoder 80-bit Shift , 100 - - ns LOAD tWLD 100 - - ns LOAD - - (*2) ns LOAD-CLOCK LOAD tr,tsf CLOCK,DATA, LOAD *2tsr max=10ns 5/28 FJDL9478-01 FJDL9478-01 ML9478 ML9478 , t sf VIH VIH LOAD VIL VIL tsr tsf I2C tVD;ACK VIH VIH SDA VIH VIL , ) I 24-25 LOAD I 17-19 SDAACK O 69-70 POCEB I M/S ="H" M/S ="L" ... OKI Electric Industry
Original
datasheet

28 pages,
482.01 Kb

T4200 SEG80 SEG40 ML9478DVWA 1085Hz FJDL9478-01 ML9478 TEXT
datasheet frame

Archived Files

Abstract Saved from Date Saved File Size Type Download
Generates Multiple Precision Outputs Dummy Load Maintains Constant Current Linear Regulator Converts
/datasheets/files/maxim/0002/an_pr009.htm
Maxim 04/04/2001 7.25 Kb HTM an_pr009.htm
Reliability Dual Comparator Forms Temperature-Compensated Proximity Detector Dummy Load Maintains /Monitor Wakes Host System LC Oscillator Has 1% THD Linear Regulator Converts 3.3V To 2.9V Load Serving Load Step-Up/Step-Down Current Source Charges Batteries Supply Circuitry Selects Main
/datasheets/files/maxim/0002/an_prodl.htm
Maxim 04/04/2001 12.47 Kb HTM an_prodl.htm
spurious TXD interrupt when shifting in/out ldi count, 00h ; Dummy load for delay ; call tempo ; Too many clocks even if count=00h ldi count, 00h ; Dummy load for delay ldi count, 00h ; Dummy load for delay nop ; 2 extra nop ; From SPRUN='0', we waited for ; 16cyc PUSHPULL '1' LOAD SPIDSR START BIT GENERATION PC3 = '0' START SPI FOR 7-BIT TRANSMISSION SPRUN = '0'? , care must be taken to load the SPI data/shift register with 0FFh before any reception and receive less
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5832-v2.htm
STMicroelectronics 14/06/1999 30.71 Kb HTM 5832-v2.htm
ldi count, 00h ; Dummy load for delay ; call tempo ; Too many clocks even if count=00h ldi count, 00h ; Dummy load for delay ldi count, 00h ; Dummy load for delay nop ; 2 extra nop ; From SPRUN='0', we waited for ; 16cyc(process)+12cyc(dummy ldi)+2cyc(nop) ; =30cyc LOAD SPIDSR START BIT GENERATION PC3 = '0' START SPI FOR 7-BIT TRANSMISSION SPRUN = '0'? RELOAD 8 bits per burst in reception mode, CPOL=0, CPHA=0). Therefore, care must be taken to load the
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5832-v4.htm
STMicroelectronics 25/05/2000 32.58 Kb HTM 5832-v4.htm
spurious TXD interrupt when shifting in/out ldi count, 00h ; Dummy load for delay ; call tempo ; Too many clocks even if count=00h ldi count, 00h ; Dummy load for delay ldi count, 00h ; Dummy load for delay nop ; 2 extra nop ; From SPRUN='0', we waited for ; 16cyc PUSHPULL '1' LOAD SPIDSR START BIT GENERATION PC3 = '0' START SPI FOR 7-BIT TRANSMISSION SPRUN = '0'? , care must be taken to load the SPI data/shift register with 0FFh before any reception and receive less
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5832.htm
STMicroelectronics 02/04/1999 30.74 Kb HTM 5832.htm
spurious TXD interrupt when shifting in/out ldi count, 00h ; Dummy load for delay ; call tempo ; Too many clocks even if count=00h ldi count, 00h ; Dummy load for delay ldi count, 00h ; Dummy load for delay nop ; 2 extra nop ; From SPRUN='0', we waited for ; 16cyc ) = OUTPUT PUSHPULL '0' PC2 (SIN) = INPUT WITH PULLUP PC3 (SOUT) = OUTPUT PUSHPULL '1' LOAD , care must be taken to load the SPI data/shift register with 0FFh before any reception and receive less
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5832-v3.htm
STMicroelectronics 16/01/2001 33.26 Kb HTM 5832-v3.htm
spurious TXD interrupt when shifting in/out ldi count, 00h ; Dummy load for delay ; call tempo ; Too many clocks even if count=00h ldi count, 00h ; Dummy load for delay ldi count, 00h ; Dummy load for delay nop ; 2 extra nop ; From SPRUN='0', we waited for ; 16cyc ) = OUTPUT PUSHPULL '0' PC2 (SIN) = INPUT WITH PULLUP PC3 (SOUT) = OUTPUT PUSHPULL '1' LOAD , care must be taken to load the SPI data/shift register with 0FFh before any reception and receive less
/datasheets/files/stmicroelectronics/stonline/books/ascii/an/5832.htm
STMicroelectronics 17/09/1999 32.58 Kb HTM 5832.htm
spurious TXD interrupt when shifting in/out ldi count, 00h ; Dummy load for delay ; call tempo ; Too many clocks even if count=00h ldi count, 00h ; Dummy load for delay ldi count, 00h ; Dummy load for delay nop ; 2 extra nop ; From SPRUN='0', we waited for ; 16cyc ) = OUTPUT PUSHPULL '0' PC2 (SIN) = INPUT WITH PULLUP PC3 (SOUT) = OUTPUT PUSHPULL '1' LOAD , care must be taken to load the SPI data/shift register with 0FFh before any reception and receive less
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5832-v1.htm
STMicroelectronics 20/10/2000 33.37 Kb HTM 5832-v1.htm
Carries Power And Signal For Remote pH Measurement MAX480 MAX480 (pdf) Dummy Load Maintains Constant ) Lower Operating Frequency Improves ICL7660 ICL7660 Voltage-Conversion Efficiency ICL8069 ICL8069 (pdf) Dummy Load Maintains Constant Current ICM7555 ICM7555 (pdf) Proximity Detector Features Ultrasonic Controller MAX1771 MAX1771 Step-Up Supply Charges Battery While Serving Load MAX1771 MAX1771 Supply Converter Generates -165V -165V at 100mA MAX417 MAX417 Load Switcher Draws Only 6uA MAX4172 MAX4172 Circuit
/datasheets/files/maxim/0000/appno000.htm
Maxim 04/04/2001 53.79 Kb HTM appno000.htm
eith er an even bigger mag amp core (further size, weight and cost increase) or a dummy load to drift high. Moreover, if the regulator starts up with a light load current, the output voltage will ex - perience an overshoot which can be risky for the load. A minimum current consumption (that ma handling high load currents so far: it avoids the losses inherent in linear regula tors and the complexity This function provides a short circuit current lower then the normal load current, thus greatly red
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5657-v2.htm
STMicroelectronics 14/06/1999 14.63 Kb HTM 5657-v2.htm