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Part Manufacturer Description PDF & SAMPLES
1-659650-0 TE's AMP SPRING, COMPRESSION
23470-3 TE's AMP SPRING,COMPRESSION
5-23470-7 TE's AMP SPRING, COMPRESSION
7-547505-6 TE's AMP SPRING, COMPRESSION
23470-8 TE's AMP SPRING,COMPRESSION
23470-9 TE's AMP SPRING,COMPRESSION

"decompression compression"

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: . . . . . . . . . . . .32 7.1 Basic Compression/Decompression Example . . . . . . . . . . . . . . . , compression/decompression program. Section 4.0: Discusses the use of internal FIFOs. Programming , , compression operation of one record, decompression of one record and simultaneous compression and , intended for systems that only need decompression in hardware. The compression is done either in software , Printers Host Printers (Rasterization & AHA3422 Decompression only device, 16 MB/s compression done at Advanced Hardware Architectures
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AHA3430 AHA3411 AHA3431 AHA3410 MCF5102 Motorola ColdFire 5202 ANDC16 MCF5102/202 ANDC13
Abstract: Compression/ Decompression Coprocessor IC Advanced Hardware Architectures, Inc. 2365 NE Hopkins Court Pullman , single chip CMOS VLSI coprocessor device that implements a lossless compression and decompression , device supports simultaneous compression and decompression operations at 25 MBytes/sec each. The device , MB/sec compression and decompression rates â'¢ 100 MB/sec burst data rate over a 32-bit data bus â , decompression operation at full bandwidth â'¢ Average 13 to 1 compression performance for bitmap image data -
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AHA3410B 16X32 WA99163-S601 PS3410B-0896 025S3
Abstract: .7 Compression & Decompression Histories .8 7.1 History , hardware New in version 4 · Independent compression and decompression histories · Independent compress , the compression and decompression modules. LZSCL.S - This little-endian source file contains the , several common functions required by both the compression and decompression modules. LZSCB.S - This , ratio can be adjusted for optimal CPU performance. 7 Compression & Decompression Histories This Hifn
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LZS221-960 DS-0007-00
Abstract: DATA COMPRESSION / DECOMPRESSION COPROCESSOR IC 90 89 88 87 86 85 84 83 82 81 80 79 78 , CMOS VLSI device that implements a lossless compression and decompression algorithm. The algorithm , compression and decompression operations at 25 MBytes/sec each. A Non-muxed microprocessor interface , D10 D9 D8 D7 FEATURES PERFORMANCE: · 25 MBytes/sec compression/decompression rates · 100 , out ports · Simultaneous compression/decompression operation at full bandwidth · Average 13 to 1 Comtech AHA
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AHA3410C AHA3410C-025 Comtech Aha date code PB3410
Abstract: COMPRESSION / DECOMPRESSION COPROCESSOR IC 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 , implements a lossless compression and decompression algorithm. The algorithm exhibits an average , 25 MBytes/sec compression/decompression rates · 100 MBytes/sec burst data rate over a 32-bit data , /decompression operation at full bandwidth · Average 13 to 1 compression ratio for bitmap image data , Single chip compression/decompression solution No external SRAM required Four 16 x 32-bit FIFOs Advanced Hardware Architectures
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Abstract: out ports â'¢ Simultaneous compression and decompression at full bandwidth â'¢ Average 15 to 1 , decompression engines â'¢ Counter checks errors in decompression SYSTEM INTERFACE: â'¢ Single chip compression , /Out 32 Data Port 16x32 Compression Data In/Out 16 Data Port 16 x 16 Decompression Data In/Out 32 Data , compression or decompression is performed using synchronous DMA over the 32-bit data port. The Video ports , compression or decompression is synchronous over the three data ports functioning as DMA masters. To initiate -
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IDT3081 Am29k R3000 PS3411-1197
Abstract: .8 Compression & Decompression Histories .9 8.1 History , library supports the simultaneous use of multiple compression and decompression histories. Each history is , faster modes Independent compression and decompression histories Independent compress and decompress , contains several common functions required by both the compression and decompression modules. LZSC.A - , turned on. Figure 1 lists the approximate speeds of compression and decompression over a range of 68K Hifn
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LZS221-68 DS-0005-00
Abstract: coprocessor device that implements a lossless compression and decompression algorithm. The algorithm exhibits , compression and decompression operations at 25 MBytes/sec each. The device interfaces directly to various RISC and CISC processors from AMD, Intel and Motorola. Compression and decompression data transfers , MB/sec compression and decompression rates â'¢ 100 MB/sec burst data rate over a 32-bit data bus â , decompression operation at full bandwidth â'¢ Average 13 to 1 compression performance for bitmap image data -
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PS3410C-0197 D2553 DDD11 dsc-100 ADVANCED HARDWARE ARCHITECTURES i960CX
Abstract: .8 Compression & Decompression Histories .8 8.1 History , compression and decompression histories. Each history is completely independent of other histories. In , compress and decompress modules Special faster modes Independent compression and decompression histories , contains several common functions required by both the compression and decompression modules. LZSC.ASM - , optimization switches turned on. Figure 1 lists the approximate speeds of compression and decompression over a Hifn
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LZS221-386 2156 compressor 80486dx2-66 motorola 386 cpu DS-0004-00
Abstract: and video out ports · Simultaneous compression and decompression at full bandwidth · Average 15 to , through compression and decompression engines · Counter checks errors in decompression SYSTEM INTERFACE: · Single chip compression/decompression solution ­ no external SRAM required · Four 16 × 32 , Compression Data In/Out Decompression Data In/Out Decompression Data In/Out Decompressed Data Out 8 32 , compression or decompression is performed using synchronous DMA over the 32-bit data port. The Video ports Advanced Hardware Architectures
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AHA3411A-033 MO-108 PS3411-0600
Abstract: lossless compression and decompression algorithm. The algorithm exhibits an average compression ratio over 13 to 1 for bitmap image data. The device supports simultaneous compression and decompression , VDD VSS D11 D10 D9 D8 D7 FEATURES PERFORMANCE: · 40 MBytes/sec compression/decompression , in and video out ports · Simultaneous compression/decompression operation at full bandwidth · , Pass-through mode passes raw data through compression and decompression engines · Programmable scan line Advanced Hardware Architectures
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AHA3430A-040 MATH COPROCESSOR PB3430
Abstract: Compression & Decompression Histories .8 7.1 History , simultaneous use of multiple compression and decompression histories. Each history is completely independent of , compression history. Compress - Compresses a block of data. Functions related to data decompression are , -386. Figure 2 lists the approximate speed of compression and decompression over a range of processors. This , maintain multiple compression and decompression histories. For example a data communications product may Hifn
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MPPC-386 U16-B DS-0009-02
Abstract: and video out ports · Simultaneous compression and decompression at full bandwidth · Average 15 to , through compression and decompression engines · Counter checks errors in decompression SYSTEM INTERFACE: · Single chip compression/decompression solution ­ no external SRAM required · Four 16 × 32 , Data In/Out Compression Data In/Out Decompression Data In/Out Decompression Data In/Out , endian and little endian byte ordering for the compression and decompression channel. Little endian Advanced Hardware Architectures
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Abstract: GZIP compression and decompression acceleration to data networking streams. This card supports data , disk or tape. The AHA362-PCIX is the fastest GZIP compression/decompression solution available and , any system requiring compression or decompression. · Open standard compression algorithm (GZIP/Deflate) · Performs both compression and decompression · Compresses and decompresses at a throughput , FUNCTIONAL DESCRIPTION The AHA362-PCIX board performs GZIP compression and decompression in hardware at a Comtech AHA
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AHA362-PCIX04 AHA362-PCIX04L AHA362PCIX04 Comtech Aha deflate compression Comtech Technology Comtech Aha gzip AHA362 362-PCIX04
Abstract: compression features are only available on the MPC556. The MPC556 utilizes a version of code compression / decompression which is called "Phase A". Phase A code compression / decompression is described in this manual. Future parts may have a different type of code compression. The BBC also contains the functional module , exception vector for "Decompression ON" mode. 4.3 Instruction VocabularyBased Compression Model Main , Instruction" Address BBC Figure 4-13 Code Decompression Process 4.3.10 Compression Environment -
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MPC555 Motorola MPC556 Motorola 417 0C00 0x80E0 1C00
Abstract: and decompression algorithm. The algorithm exhibits an average compression ratio over 13 to 1 for bitmap image data. The device supports simultaneous compression and decompression operations at 40 , Motorola. Compression and decompression data transfers normally occur over a high speed bidirectional 32 , signals, as applicable. 1.2 FEATURES PERFORMANCE: · 40 MBytes/sec compression and decompression , in and video out ports · Simultaneous compression and decompression operation at full bandwidth · Comtech AHA
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29030 PS3430
Abstract: .10 Compression & Decompression Histories .10 8.1 History , simultaneous use of multiple compression and decompression histories. Each history is completely independent of , Compression Performance Analysis in Data Communications" for details. 8 Compression & Decompression , applications may want to maintain multiple compression and decompression histories. For example a data , initialized to the start state before it can be used for compression or decompression. To properly finish Hifn
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LZS221-C pentium 200 mmx five function LZS221C DS-0006-00
Abstract: chip CMOS VLSI coprocessor device that implements a lossless compression and decompression algorithm , supports simultaneous compression and decompression operations at 25 MBytes/sec each. The device , and video out ports · Simultaneous compression and decompression operation at full bandwidth · , -bit video input and output ports · Pass-through mode passes raw data through compression and decompression , Single chip compression and decompression solution · No external SRAM required · Four 16 × 32 Advanced Hardware Architectures
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29035 PS3410C-0600
Abstract: Vocabulary Generator Figure 4-4 Code Compression Process 4.3.5 Decompression · The instruction code is , Figure 4-5 Code Decompression Process 4.3.6 Compression Environment Initialization In order to commence , responsible for on-line (previously compressed) instruction code decompression in the "Decompression ON" mode. NOTE The code compression features of the MPC566 are slightly different than the code compression of , exception vector for "Decompression ON" mode 4.2.3 ICDU Key Features · Instruction code on-line Motorola
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MPC565 bbc ds 17 MPC565/MPC566
Abstract: lossless compression and decompression algorithm. The algorithm exhibits an average compression ratio over 13 to 1 for bitmap image data. The device supports simultaneous compression and decompression , AMD, Intel and Motorola. Compression and decompression data transfers normally occur over a high , . 1.2 FEATURES PERFORMANCE: · 40 MB/sec compression and decompression rates · 160 MB/sec burst , Simultaneous compression and decompression operation at full bandwidth · Average 13 to 1 compression Comtech AHA
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