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"cyclic redundancy check" data transmission

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Abstract: Application Note: Virtex Series and Virtex-II Family R IEEE 802.3 Cyclic Redundancy Check Author: Chris Borrelli XAPP209 XAPP209 (v1.0) March 23, 2001 Summary Cyclic Redundancy Check (CRC) is an error-checking code that is widely used in data communication systems and other serial data transmission systems , detection scheme in serial data transmission applications. This code is based on polynomial arithmetic , Redundancy Check standards are CRC-8, CRC-12 CRC-12, CRC-16 CRC-16, CRC-32 CRC-32, and CRC-CCIT. This application note discusses ... Xilinx
Original
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8 pages,
104.53 Kb

CRC 8 verilog code 32 bit LFSR verilog code 5 bit LFSR 0xC704DD7B crc32 lfsr CRC8 and crc16 CRC-32 CRC-16 and verilog verilog code 16 bit LFSR cyclic redundancy check XAPP209 verilog code 8 bit LFSR CRC-16 and CRC-32 crc 16 verilog 802.3 CRC32 cyclic redundancy check verilog source CRC-32 LFSR verilog code CRC8 CRC-16 and CRC-32 Ethernet crc verilog code 16 bit TEXT
datasheet frame
Abstract: ideally suited to perform cyclic redundancy checking on data transmissions with minimal additional , Redundancy Checking Error detection is important, whenever there is a chance of data getting corrupted. Whether it's a piece of stored code or a data transmission, you can add a piece of redundant information , , which is commonly used to detect errors either in data transmission or data storage. Whilst it is not , of cyclic redundancy calculations, the polynomial A would be the binary message string or data and ... Freescale Semiconductor
Original
datasheet

18 pages,
195.08 Kb

AC128 AN3795 CRC-CCITT 0xFFFF CRC16 HCS08 MC9S08AC128 AC128 transistor transistor AC128 CCITT v.41 CRC-16-CCITT CRC16-CCITT TEXT
datasheet frame
Abstract: voice channel data. An optional CRC mode generates CRC multiframe alignment and a cyclic redundancy , converts the incoming NRZ data on its D input pin into HDB3 pseudo-ternary form for transmission over a , the Timeslot Zero Transmitter. The output data from the transmission multiplexer is also input to , transmission code, ensuring adequate clock recovery at the receiver. This data is output on the TXD1 and TXD2 , . The Timeslot Zero data is used as one of the inputs to the transmission multiplexer. The Timeslot ... Zarlink Semiconductor
Original
datasheet

16 pages,
180.68 Kb

MV1403 FRS15 FRS13 CLA60000 704 mfd DS3046-2 TEXT
datasheet frame
Abstract: redundancy check is carried out on the incoming data. In addition receive demonstration mode generates , data is used as one of the inputs to the transmission multiplexer. The Timeslot Sixteen transmitter , timeslot 16. This data along with the TS16 frame marker are also used as inputs to the transmission multiplexer, TMUX. The transmission multiplexer forms a single PCM data stream at its Q output by multiplexing , output of the Timeslot Zero Transmitter. The output data from the transmission multiplexer is also input ... Zarlink Semiconductor
Original
datasheet

17 pages,
190.47 Kb

MV1403 DS3046-2 TEXT
datasheet frame
Abstract: redundancy check is carried out on the incoming data. In addition receive demonstration mode generates , data is used as one of the inputs to the transmission multiplexer. The Timeslot Sixteen transmitter , timeslot 16. This data along with the TS16 frame marker are also used as inputs to the transmission multiplexer, TMUX. The transmission multiplexer forms a single PCM data stream at its Q output by multiplexing , output of the Timeslot Zero Transmitter. The output data from the transmission multiplexer is also input ... Zarlink Semiconductor
Original
datasheet

17 pages,
191.18 Kb

rx2 208 MV1403 DS3046-2 TEXT
datasheet frame
Abstract: redundancy check is carried out on the incoming data. In addition receive demonstration mode generates , data is used as one of the inputs to the transmission multiplexer. The Timeslot Sixteen transmitter , timeslot 16. This data along with the TS16 frame marker are also used as inputs to the transmission multiplexer, TMUX. The transmission multiplexer forms a single PCM data stream at its Q output by multiplexing , output of the Timeslot Zero Transmitter. The output data from the transmission multiplexer is also input ... Zarlink Semiconductor
Original
datasheet

17 pages,
191.53 Kb

MV1403 DS3046-2 TEXT
datasheet frame
Abstract: redundancy check is carried out on the incoming data. In addition receive demonstration mode generates , data is used as one of the inputs to the transmission multiplexer. The Timeslot Sixteen transmitter , timeslot 16. This data along with the TS16 frame marker are also used as inputs to the transmission multiplexer, TMUX. The transmission multiplexer forms a single PCM data stream at its Q output by multiplexing , output of the Timeslot Zero Transmitter. The output data from the transmission multiplexer is also input ... Zarlink Semiconductor
Original
datasheet

17 pages,
229.65 Kb

MV1403 DS3046-2 TEXT
datasheet frame
Abstract: CRC multiframe alignment and a cyclic redundancy check is carried out on the incoming data. In , macrocell converts the incoming NRZ data on its D input pin into HDB3 pseudo-ternary form for transmission , inputs. The Timeslot Zero data is used as one of the inputs to the transmission multiplexer. The Timeslot , transmission multiplexer, TMUX. The transmission multiplexer forms a single PCM data stream at its Q output by , output of the Timeslot Zero Transmitter. The output data from the transmission multiplexer is also input ... Zarlink Semiconductor
Original
datasheet

18 pages,
368.83 Kb

MV1403 TEXT
datasheet frame
Abstract: redundancy check is carried out on the incoming data. In addition receive demonstration mode generates , data is used as one of the inputs to the transmission multiplexer. The Timeslot Sixteen transmitter , timeslot 16. This data along with the TS16 frame marker are also used as inputs to the transmission multiplexer, TMUX. The transmission multiplexer forms a single PCM data stream at its Q output by multiplexing , output of the Timeslot Zero Transmitter. The output data from the transmission multiplexer is also input ... Zarlink Semiconductor
Original
datasheet

19 pages,
213.2 Kb

MV1403 DS3046-2 TEXT
datasheet frame
Abstract: CRC multiframe alignment and a cyclic redundancy check is carried out on the incoming data. In , converts the incoming NRZ data on its D input pin into HDB3 pseudo-ternary form for transmission over a , the Timeslot Zero Transmitter. The output data from the transmission multiplexer is also input to , transmission code, ensuring adequate clock recovery at the receiver. This data is output on the TXD1 and TXD2 , . The Timeslot Zero data is used as one of the inputs to the transmission multiplexer. The Timeslot ... Zarlink Semiconductor
Original
datasheet

20 pages,
235.26 Kb

plessey gps receiver FRS Receiver FRS13 FRS15 HDB-3 CLA60000 Hp TX2 MV1403 nrz to hdb3 HDB3 to nrz HDB3 TEXT
datasheet frame

Archived Files

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) Generation of 32-Bit Cyclic Redundancy Check (CRC) for Transmission of 1394 Packets 32-Bit CRC Checking on bi-directional asynchronous/isochronous data transfers to and from an IEEE 1394-1995 serial bus physical layer ) Package. Programmable Microcontroller Interface with 8-Bit or 16-Bit Data Bus, Three Modes of Operation Through the Microcontroller Interface) Asynchronous Packet Transmission from Internal FIFO (Accessed TSB12LV4X TSB12LV4X BULKY DATA INTERFACE   (SLLA017A SLLA017A) User Manuals LYNXSOFT SOFTWARE APPLICATION
/datasheets/files/texas-instruments/data/wwwti~1.com/sc/docs/products/analog/ts0faa~1.htm
Texas Instruments 28/01/2000 18.59 Kb HTM ts0faa~1.htm
) Generation of 32-Bit Cyclic Redundancy Check (CRC) for Transmission of 1394 Packets 32-Bit CRC Checking on bi-directional asynchronous/isochronous data transfers to and from an IEEE 1394-1995 serial bus physical layer ) Package. Programmable Microcontroller Interface with 8-Bit or 16-Bit Data Bus, Three Modes of Operation Through the Microcontroller Interface) Asynchronous Packet Transmission from Internal FIFO (Accessed TSB12LV4X TSB12LV4X BULKY DATA INTERFACE   (SLLA017A SLLA017A) User Manuals LYNXSOFT SOFTWARE APPLICATION
/datasheets/files/texas-instruments/data/www.ti.com/sc/docs/products/analog/tsb12lv31.html
Texas Instruments 29/01/2000 18.59 Kb HTML tsb12lv31.html
Redundancy Check A check performed on data to see if an error has occurred in transmitting, reading, or samples followed by one frame containing 45 samples. Full-duplex Computer data transmission Transmission rate expressed in megabytes per second. Message Pipe A pipe that transfers data using   Packet A bundle of data organized in a group for transmission. Packets typically specific set of rules, procedures, or conventions relating to format and timing of data transmission
/datasheets/files/texas-instruments/data/www.ti.com/sc/docs/msp/usb/terms.htm
Texas Instruments 18/01/2000 61.18 Kb HTM terms.htm
data into an IR pulse stream for transmission and the frame/driver layer adds such information as COMMUNICATIONS TO ITS VIRTUAL PERIPHERAL PORTFOLIO Software Module Lets OEMs Add Wireless Data Link IrDA (Infra-Red Data Association) standard and the high-level IrCOMM interface protocol, providing The IrDA Virtual Peripheral module uses the ability of the SX MCU to rapidly re-send data upon request to eliminate the large data buffers that are typically required for the application. It also uses
/datasheets/files/scenix/htdocs/news/press/990907.htm
Scenix 14/06/2000 15.75 Kb HTM 990907.htm
Redundancy Check A check performed on data to see if an error has occurred in transmitting, reading, or samples followed by one frame containing 45 samples. Full-duplex Computer data transmission Transmission rate expressed in megabytes per second. Message Pipe A pipe that transfers data using   Packet A bundle of data organized in a group for transmission. Packets typically specific set of rules, procedures, or conventions relating to format and timing of data transmission
/datasheets/files/texas-instruments/data/wwwti~1.com/sc/docs/msp/usb/terms.htm
Texas Instruments 17/01/2000 61.18 Kb HTM terms.htm
Integration. Cyclic Redundancy Check A check performed on data to see if an error has occurred in samples followed by one frame containing 45 samples. Full-duplex Computer data transmission Transmission rate expressed in megabytes per second. Message Pipe A pipe that transfers data using   Packet A bundle of data organized in a group for transmission. Packets typically specific set of rules, procedures, or conventions relating to format and timing of data transmission
/datasheets/files/texas-instruments/data/sc/docs/msp/usb/terms.htm
Texas Instruments 08/02/1999 59.9 Kb HTM terms.htm
layer converts data into an IR pulse stream for transmission and the frame/driver layer adds CRC (cyclic redundancy check) to the "payload" data. For reception, the frame/driver layer Software Module Lets OEMs Add Wireless Data Link To New Electronic Systems hardware platform, implements the lower levels of the IrDA (Infra-Red Data Association rapidly re-send data upon request to eliminate the large data buffers that are typically
/datasheets/files/ubicom/htdocs/news/press/990907.html
UBICOM 12/02/2001 16.77 Kb HTML 990907.html
serializes data, adds framing and cyclic redundancy check (CRC) fields, and interfaces to the network Data Sheet Abstract: TNETE110 TNETE110:THUNDERLAN PCI ETHERNET CONTROLLER ) Controller for Low Host CPU and Bus Utilization Plug-and-Play Compatible Supports 32-Bit Data Phase-Locked Loop (PLL) Smart Squelch Allows for Transparent Link Testing Transmission Waveshaping , operates at speeds up to 33 MHz and is capable of internal data transfer rates up to 2 Gbps, taking full
/datasheets/files/texas-instruments/sc/psheets/abstract/datasht/spws018b.htm
Texas Instruments 01/06/1998 8.59 Kb HTM spws018b.htm
32-Bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits) Up to 32 Address Lines (at least 28 always Buffer Descriptors Supports Continuous Mode Transmission and Reception on All Serial Channels Transparent (Frame Based with Optional Cyclic Redundancy Check (CRC) Signalling System #7 (RAM option
/datasheets/files/motorola/design-n/solution/isdn/ch3-22/3_22.htm
Motorola 25/11/1996 10.3 Kb HTM 3_22.htm
total protocol handler. On transmit, the PH serializes data, adds framing and cyclic redundancy check Data Sheet Abstract: TNETE110A TNETE110A:THUNDERLAN(TM) PCI ETHERNET(TM Plug-and-Play Compatible Supports 32-Bit Data Streaming on PCI Bus Time Division Multiplexed SRAM Squelch Allows for Transparent Link Testing Transmission Waveshaping Autopolarity (Reverse Polarity recognition, CRC and error checking, frame disassembly, and deserialization. Data for multiple channels is
/datasheets/files/texas-instruments/sc/psheets/abstract/datasht/spws022a.htm
Texas Instruments 01/06/1998 9.67 Kb HTM spws022a.htm