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CC0805JRX7RABB102 YAGEO Corporation CAP,CERAMIC,1NF,200VDC,5% -TOL,5% +TOL,X7R TC CODE,-15,15% TC,0805 CASE
SC1808KKX7RTBB102 YAGEO Corporation CAP,CERAMIC,1NF,10% -TOL,10% +TOL,X7R TC CODE,-15,15% TC,1908 CASE
CC1206KKX7RBBB682 YAGEO Corporation CAP,CERAMIC,6.8NF,500VDC,10% -TOL,10% +TOL,X7R TC CODE,-15,15% TC,1206 CASE
6200T5LC Visual Communications Company Single Color LED, Green, ROHS COMPLIANT, SUBMINIATURE, SMT, 1 PIN
5100H6 Visual Communications Company Single Color LED, Blue, Diffused White, ROHS COMPLIANT PACKAGE-2
2111A1 Visual Communications Company Single Color LED, Red, ROHS COMPLIANT PACKAGE-2

"content addressable memory" search compare match current voltage

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: Addressable Memory ( NCAM ) match is detected the device will then output a Match Flag and the Address of , participate in a search. Upon detection of a match, the device will output the match flag, the address of , . The current active Configuration Register set controls, Writes, Reads, Moves and Compare operations , NL81480A NL82480A 1K X 64 2K X 64 Content Addressable Memory ( NCAM ) Features · · · , Priority Encoder / RESET DEMUX Validity Bits / EC Memory Control, Match & Flag Logic Netlogic Microsystems
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netlogic CAM Netlogic Content Addressable Memory 01AEH Priority Encoder CAM I/O15 NL8X480A I/O15-0 44-PIN
Abstract: OUT BIT COMPARE FOR ONE OR MORE BITS 50% tDM- MATCH OUTPUT tl/f/9857-10 FIGURE 5. Search Mode , words. A search/compare is performed by placing a LOW on the bit mask inputs and presenting a data pattern to the data inputs. Corresponding to the bit mask inputs, the match outputs (m0-m3) go LOW if a , CM ffWk National MjA Semiconductor F100142 4 x 4-Bit Content Addressable Memory General Description The F100142 is a 4 word by 4-bit Content Addressable Memory (CAM). Reading is accomplished when -
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tms 1035 TDD 1605 f100145 resistor Mk2 F100145 YB15-YB12 YB11-YB8 VB3-Y80 F10014S OB15-OB12
Abstract: , the data input word is simultaneously compared to each of the stored memory words. A search/compare fs , Potential to Ground Pin Input Voltage (DC) Output Current (DC Output HIGH) Operating Range (Note 2) 0°C to , input LOW Voltage Input LOW Current Min -1035 -1830 -1045 -1165 -1830 0.50 Typ Max -880 -1620 -1610 -880 , an output enable. MATCH OUTPUT \ (-.DM- 50% 1 â'¢ * \ ~látjjjâ'"¡fS" 7 ' 50% FIGURE 5. Search , New Designs r-HC-23-3/ 100142 4 x 4-Bit Content Addressable Memory General Description The 100142 is a -
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SD1122 TL/F/9857 OB11-OB8 TL/F/9857-11
Abstract: DS28E04-100: 4096-Bit 1-Wire Addressable EEPROM with PIO ABSOLUTE MAXIMUM RATINGS All Pins: Voltage to , Standby Supply Current PINS A0 TO A6 Input Low Voltage SYMBOL IGND ICC ICCS CONDITIONS , High Voltage VIHA Input Load Current POL PIN Input Low Voltage ILA VILPOL Pin at GND , , VCC) (Note 1) Leakage Current PIO PINS Input Low Voltage ILKPOL VX 0.3V Pin at 5.25V Input High Voltage Output Low Voltage at 4mA Leakage Current Minimum Sensed PIO Pulse Output Pulse Maxim Integrated Products
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4096-B DS28E04100
Abstract: -100: 4096-Bit 1-Wire Addressable EEPROM with PIO ABSOLUTE MAXIMUM RATINGS All Pins: Voltage to GND All , Current Supply Current Standby Supply Current PINS A0 TO A6 Input Low Voltage SYMBOL IGND ICC , (Note 1) Input High Voltage VIHA Input Load Current POL PIN Input Low Voltage ILA VILPOL , max(VPUP, VCC) (Note 1) Leakage Current PIO PINS Input Low Voltage ILKPOL VX 0.3V Pin at 5.25V Input High Voltage Output Low Voltage at 4mA Leakage Current Minimum Sensed PIO Pulse Maxim Integrated Products
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111kbps CRC16 DS2480B DS2490 DS28E04S-100 J-STD-020A 1111110X
Abstract: -Wire Addressable EEPROM with PIO ABSOLUTE MAXIMUM RATINGS All Pins: Voltage to GND All Pins: Sink Current , ) Input Load Current POL PIN Input Low Voltage ILA VILPOL (Note 1) Input High Voltage VIHPOL VX = max(VPUP, VCC) (Note 1) Leakage Current PIO PINS Input Low Voltage ILKPOL Pin , (Note 5) ILKP Pin at 5.25V Output Low Voltage at 4mA Leakage Current Minimum Sensed PIO , Load Current High-to-Low Switching Threshold Input Low Voltage Input High Voltage Low-to-High Maxim Integrated Products
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Abstract: results of a Compare operation. During a compare operation, when there is no match, RBUS is High-Z. For a compare operation, when there is a match, this bus outputs the CAM index of the Highest Priority Match , in the following cycle. The Match Flag is available in the current clock cycle. The user must set , in the memory will not enter the compare operation and behave as if a match occurred for that , register holds the address of the highest priority match. This register is updated after all compare Netlogic Microsystems
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NL82721R NL82721 ternary netlogic Ternary CAM RBUS12 NetLogic Ternary Content Addressable NL82721R-33 NL82721R-40
Abstract: Supply Voltage (V) Normalized Dynamic Supply Current vs. Ambient Temp. Vdd=3.3V, 100% Compare , operation. During a compare operation, when there is no match, RBUS is High-Z. For a compare operation , not enter the compare operation and behave as if a match occurred for that particular bit. If a mask , register holds the address of the highest priority match. This register is updated after all compare , is written. Reserved; will read `000'. Match flag. Updated after all compare operations; reflects Netlogic Microsystems
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NL84620R NL84620 CBUS43 ipCAM ipCAM ethernet module NL84620R-33 NL84620R-40
Abstract: ) enables the CCF flag in the CCON SFR to generate an interrupt when a match or compare occurs in the , PCA counter and the module's capture/compare register. â'¢ The match bit MAT (CCAPMn.3) when set will , = 1, a match of the PCA counter with this module's compare/capture register causes the CCFn bit in , an unwanted match doesn't occur while modifying the compare value. Writing to CCAPnH will set ECOM , options: â'¢ 1. periodically change the compare value so it will never match the PCA timer, â'¢ 2 -
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80C51 80C52 ic 80c51rd2 TS87C51RB2 PLCC44 PDIL40 JLCC-68 05A2 TS80C51RA2/RD2 TS83C51RB2/RC2/RD2 C51RB2/RC2/RD2 TS80C51R
Abstract: results of a Compare operation. During a compare operation, when there is no match, RBUS is High-Z. For a compare operation, when there is a match, this bus outputs the CAM index of the Highest Priority Match , compare instruction are output on RBUS in the following cycle. The Match Flag is available in the , compare operation and behave as if a match occurred for that particular bit. If a mask bit is `0', the , match. This register is updated after all compare operations. This register is read only and is updated Netlogic Microsystems
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ternary content addressable memory counter up/down netlogic cam memory
Abstract: operation. During a compare operation, when there is no match, RBUS is High-Z. For a compare operation , not enter the compare operation and behave as if a match occurred for that particular bit. If a mask , register holds the address of the highest priority match. This register is updated after all compare , is written. Reserved; will read `000'. Match flag. Updated after all compare operations; reflects the internal match flag status. Multiple match flag. Updated after all compare operations; reflects Netlogic Microsystems
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CBUS30
Abstract: , compare, search .) are well served by using one data pointer as a â'™sourceâ'™ pointer and the other , interrupt when a match or compare occurs in the associated module. q PWM (CCAPMn.1) enables the pulse , module to toggle when there is a match between the PCA counter and the module's capture/compare register , when there is a match between the PCA counter and the module's capture/compare register. q The , capture. Match. When MATn = 1, a match of the PCA counter with this module's compare/capture register Temic Semiconductors
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87C51RD2 PLCC68 VQFP64 JLCC68 80C51RA2 80C51RD2
Abstract: 35 Frequency (MHz) Normalized Dynamic Supply Current vs. Supply Voltage 25 Deg C, 100% Compare , operation. During a compare operation, when there is no match, RBUS is High-Z. For a compare operation , cycle. However, the Match Flag is available in flow through mode only and is output in the current , Address if there is no match and is a "Learn" type compare operation. The highest significant bits (b63 , . Reserved; will read `000'. Match flag. Updated after all compare operations; reflects the internal match Netlogic Microsystems
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nfa 102 nfa 223 Select 642 UX NL82721-33 NL82721-40
Abstract: increase speed and reduce code size, for example, block operations (copy, compare, search .) are well , ) enables the CCF flag in the CCON SFR to generate an interrupt when a match or compare occurs in the , counter and the module's capture/compare register. · The match bit MAT (CCAPMn.3) when set will cause , capture. Match. When MATn = 1, a match of the PCA counter with this module's compare/capture register , clear ECOM so that an unwanted match doesn't occur while modifying the compare value. Writing to CCAPnH Atmel
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89C51RD2 parallel programming 89c51rd2 application notes atmel 89c51rd2 T87C51RD2 T89C51RD2 89C51RD2 VQFP44
Abstract: data word will be forced to a match. Status Register SR0 holds status information after compare , provides the Multiple Match Flag. This output is updated for all compare operations. After reset /MMF is , the results of a Compare operation. During a compare operation, when there is no match, RBUS is High-Z. For a compare operation, when there is a match, this bus outputs the CAM index of the Highest , on RBUS in the following cycle. The Match Flag is available in the current clock cycle. This is Netlogic Microsystems
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NLM82721R-25 NLM82721R-33 NLM83721R-25 NLM83721R-33 NLM84721R-25 NLM84721R-33
Abstract: Match Flag. This output is updated for all compare operations. After reset /MMF is high. 2.12 Results , compare operation. During a compare operation, when there is no match, RBUS is High-Z. For a compare , priority match. This register is updated after all compare operations. This register is read only and is , compare operations; reflects the internal match flag status. Multiple match flag. Updated after all compare operations; reflects the internal multiple match flag status. Full flag. Updated after write to Netlogic Microsystems
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NFA 220 NLM84620R-33 NLM84620R-25 NLM85620R-33 NLM85620R-25 NLM86620R-33 NLM86620R-25
Abstract: word will be forced to a match. Status Register SR0 holds status information after compare, read , synchronous output provides the Multiple Match Flag. This output is updated for all compare operations , is no match, RBUS is High-Z. For a compare operation, when there is a match, this bus outputs the , results of a compare instruction are output on RBUS in the following cycle. The Match Flag is available , highest priority match. This register is updated after all compare operations resulting in a match. This Netlogic Microsystems
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Abstract: Compare operation. During a compare operation, when there is no match, RBUS is High-Z. For a compare , compare operation, when there is no match, this bus outputs the Next Free Address (NFA), the Device ID , cycle. However, the Match Flag is available in flow through mode only and is output in the current , compare instructions. Updated with Highest Priority Match (HPM) index when there is a match; updated with Next Free Address if there is no match and is a "Learn" type compare operation. The highest Netlogic Microsystems
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mcr 72 hpm 06 NFA 222 CBUS63-CBUS0 1kx12
Abstract: example, block operations (copy, compare, search .) are well served by using one data pointer as a , match or compare occurs in the associated module. · PWM (CCAPMn.1) enables the pulse width modulation , there is a match between the PCA counter and the module's capture/compare register. · The match bit , interrupt. Toggle. When TOGn = 1, a match of the PCA counter with this module's compare/capture register , clear ECOM so that an unwanted match doesn't occur while modifying the compare value. Writing to CCAPnH Temic Semiconductors
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Abstract: Electronic-Library Service CopyRight 2003 48 bit Compare for Match (48-bit Mode) To perform a match operation on , match. Some successively reading the current lowest address, setting applications, however may yield , 00 00 Compare "XXDCBA9876XX" against CAM Wait (Encode) - L X H H xxxx 00 Encode match address â , Am99C10 256 x 48 Content Addressable Memory H Advanced Micro Devices DISTINCTIVE CHARACTERISTICS â  256 word x 48-blt Content Addressable Memory (CAM) - Optimized for Address Decoding in Local -
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BA9876543210 BA9S cd 4028 99C10 06837C 06971C WCP-10M-
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