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"content addressable memory" array memory blocks

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: R Virtex Tech Topic Content Addressable Memory VTT001 VTT001 (v1.0) 24 July 2000 Introduction , 1-800-255-7778 1 R Content Addressable Memory encode_cycle, the MATCH_OK signal goes High and the , 1-800-255-7778 VTT001 VTT001 (v1.0) 24 July 2000 R Content Addressable Memory cycle, by searching for the , Addressable Memory in ATM applications". Switch Data = "ATM cell address" CAM 1024 locations RAM , . www.xilinx.com 1-800-255-7778 3 R Content Addressable Memory The following CAM configurations are ... Xilinx
Original
datasheet

10 pages,
66.01 Kb

1024-location Music Semiconductors ternary netlogic "application note" netlogic cam memory NetLogic content addressable memory NetLogic Microsystems Ternary CAM VTT001 Sibercore Sibercore Technologies Priority Encoder CAM network search engine netlogic Content Addressable Memory NetLogic Ternary Content Addressable "Content Addressable Memory" netlogic ternary netlogic ternary content addressable memory "Content Addressable Memory" NetLogic netlogic CAM TEXT
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Abstract: Content Addressable Memory (CAM) Applications for ispXPLD Devices TM July 2002 Application Note AN8071 AN8071 Introduction Content Addressable Memory (CAM) is a type of memory that compares the , 1 an8071_01 Content Addressable Memory (CAM) Applications for ispXPLD 5000MX 5000MX Devices , original. One kind of 2 Content Addressable Memory (CAM) Applications for ispXPLD 5000MX 5000MX Devices , ASCII form. 3 Content Addressable Memory (CAM) Applications for ispXPLD 5000MX 5000MX Devices ... Lattice Semiconductor
Original
datasheet

9 pages,
59.8 Kb

Priority Encoder CAM LZ78 128x48 AN-8071 computer networking diagram "Content Addressable Memory" computer Network Types diagram Condensed Data Book 1977 an8071 TEXT
datasheet frame
Abstract: . Multifunction Blocks The ispXPLD architecture allows the MFB to be configured as a variety of memory blocks as , each of the memory modes it is possible to specify the power-on state of each bit in the memory array. This allows the memory to be used as ROM if desired. Each bit in the memory array can have one of four , supported by cascading multiple blocks. For dual port, single port, and pseudo-dual port memory blocks , 128x192. Lattice's ispLEVER design tool automatically combines blocks to support the memory size ... Lattice Semiconductor
Original
datasheet

50 pages,
253.91 Kb

AN8071 128X48 tcam ternary content addressable memory VHDL 5000MX TEXT
datasheet frame
Abstract: . Multifunction Blocks The ispXPLD architecture allows the MFB to be configured as a variety of memory blocks as , each of the memory modes it is possible to specify the power-on state of each bit in the memory array. This allows the memory to be used as ROM if desired. Each bit in the memory array can have one of four , supported by cascading multiple blocks. For dual port, single port, and pseudo-dual port memory blocks , 128x192. Lattice's ispLEVER design tool automatically combines blocks to support the memory size ... Lattice Semiconductor
Original
datasheet

50 pages,
674.79 Kb

TCAM AN8071 128X48 "Single-Port RAM" ternary content addressable memory ternary content addressable memory VHDL 5000MX TEXT
datasheet frame
Abstract: Content Addressable Memory is a storage array designed to quickly find the location of a particular stored value. By comparing the input against the data in memory, a CAM determines if an input value matches one or more values stored in the array. If the comparison is done simultaneously, the CAM is said , Flexible CAMs (Content Addressable Memory) are implemented in VirtexTM family devices by taking advantage of the reprogrammability of the basic LUT as a Shift Register (SRL16 SRL16) or as a SelectRAM+TM memory ... Xilinx
Original
datasheet

6 pages,
39.1 Kb

XCV50 cam memory circuit cam memory circuit design RAM16X1S SRL16 SRL16E XAPP202 XAPP203 XAPP204 XCV400 XCV300 XC4000X block selectram overview XAPP201 limit switch cam type RAM16X1 TEXT
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Abstract: memory array is organized into 128 uniform blocks of 64KB each (or 32Kwords each). The M29W640GT M29W640GT and M29W640GB M29W640GB feature an asymmetric memory block, each having an array of 135 blocks divided into 8 parameter , has the parameter blocks at the top of the memory array whereas the M29W640GB M29W640GB locates the parameter , The memory array for M29W640GH M29W640GH and M29W640GL M29W640GL devices is organized into 128 uniform blocks of 64KB each , · Memory organization ­ M29W640GH/L M29W640GH/L 128 main blocks, 64KB each ­ M29W640GT/B M29W640GT/B 127 main blocks, 64KB ... Micron Technology
Original
datasheet

72 pages,
824.96 Kb

M29W640GT70N3F M29W640GL70Z M29W640GH7 M29W640GT70 M29W640GH M29W640GL M29W640GT M29W640GB M29W640GH/L M29W640GT/B TSOP48 TSOP56 TFBGA48 FBGA64 TBGA64 TEXT
datasheet frame
Abstract: M29W640GH M29W640GH and M29W640GL M29W640GL memory array is organized into 128 uniform blocks of 64KB each (or 32Kwords each). The M29W640GT M29W640GT and M29W640GB M29W640GB feature an asymmetric memory block, each having an array of 135 blocks , 32Kwords each). The M29W640GT M29W640GT has the parameter blocks at the top of the memory array whereas the M29W640GB M29W640GB , memory array for M29W640GH M29W640GH and M29W640GL M29W640GL devices is organized into 128 uniform blocks of 64KB each for x8 , program • Memory organization – M29W640GH/L M29W640GH/L 128 main blocks, 64KB each – M29W640GT/B M29W640GT/B 127 main ... Micron Technology
Original
datasheet

73 pages,
826.79 Kb

M29W640GH M29W640GL M29W640GT M29W640GB TEXT
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Abstract: joining of RAM blocks. - Two 16 x 8-bit content addressable memory (CAM) support. - FIFO 512 x 18 , LUTs EBR Blocks EBR Bits (K) Usable* Gates (K) OR4E2 OR4E4 OR4E6 26 36 46 24 , dual-port. Create large, fast RAM/ROM blocks (128 x 8 in only eight PFUs) using the SLIC decoders as bank , . New 200 MHz embedded quad-port RAM blocks, two read ports, two write ports, and two sets of byte , , microprocessor interface (MPI), embedded RAM blocks, and embedded standard cell blocks with 100 MHz bus ... Lattice Semiconductor
Original
datasheet

6 pages,
55.38 Kb

MPC860 MPC8260 Field-Programmable Gate Arrays TEXT
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Abstract: - 20 4 - 21 4 - 22 4 - 23 4 - 24 4 - 25 4 - 26 4 - 27 viii dbuffer Array in Memory at , Array in Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . r Array in Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x Array in Memory . . . . . . , . . . . r Array in Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... Texas Instruments
Original
datasheet

141 pages,
426.2 Kb

TMS320 fixed point fir filter on matlab LMS adaptive filter matlab code for modified lms algorithm matlab code using 8 point DFT butterfly NX 38 rfft dlms Modified LMS Algorithm iIR FILTER implementation in TMS320C55x 55xdsplib cbrev32 SPRU422G SPRU422G SPRU422G TEXT
datasheet frame
Abstract: memory array is organized into 128 uniform blocks of 64KB each (or 32Kwords each). The M29W640GT M29W640GT and M29W640GB M29W640GB feature an asymmetric memory block, each having an array of 135 blocks divided into 8 parameter , has the parameter blocks at the top of the memory array whereas the M29W640GB M29W640GB locates the parameter , The memory array for M29W640GH M29W640GH and M29W640GL M29W640GL devices is organized into 128 uniform blocks of 64KB each , · Memory organization ­ M29W640GH/L M29W640GH/L 128 main blocks, 64KB each ­ M29W640GT/B M29W640GT/B 127 main blocks, 64KB ... Micron Technology
Original
datasheet

73 pages,
825.69 Kb

M29W640GH M29W640GL M29W640GT M29W640GB M29W640GH/L M29W640GT/B TEXT
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Archived Files

Abstract Saved from Date Saved File Size Type Download
Addressable Memory) A Content Addressable Memory is a storage array designed to quickly find the location Available in 4K blocks, each block is a fully-synchronous true dual-port memory.  Each port allows reads blocks can be combined to create wider or deeper memory. The True Dual-Port Block SelectRAM is capable of memory controllers.  Memory controller components are represented by sets of function blocks (see leap in internal memory bandwidth by supporting up to 832Kbits of True Dual-Port RAM (208 blocks of
/datasheets/files/xilinx/docs/rp00003/rp003b3.htm
Xilinx 06/03/2000 35.88 Kb HTM rp003b3.htm
eavesdropping and/or intrusion on a per port basis 58 On Chip CAMs (Content Addressable Memory) allow filter circuitry. The RIC2A repeater consists of two major functional blocks: The segment specific block and the shared functional blocks. The segment specific block incorporates relevant IEEE specifications on a per port basis. The shared functional blocks incorporate core logic for the entire IEEE repeater unit. The core logic blocks consist of a repeater receive multiplexor, a phase locked loop (PLL
/datasheets/files/national/htm/nsc02708-v4.htm
National 16/09/1998 10.2 Kb HTM nsc02708-v4.htm
eavesdropping and/or intrusion on a per port basis 58 On Chip CAMs (Content Addressable Memory) allow filter circuitry. The RIC2A repeater consists of two major functional blocks: The segment specific block and the shared functional blocks. The segment specific block incorporates relevant IEEE specifications on a per port basis. The shared functional blocks incorporate core logic for the entire IEEE repeater unit. The core logic blocks consist of a repeater receive multiplexor, a phase locked loop (PLL
/datasheets/files/national/htm/nsc05279.htm
National 18/12/1998 10.62 Kb HTM nsc05279.htm
eavesdropping and/or intrusion on a per port basis 58 On Chip CAMs (Content Addressable Memory) allow filter circuitry. The RIC2A repeater consists of two major functional blocks: The segment specific block and the shared functional blocks. The segment specific block incorporates relevant IEEE specifications on a per port basis. The shared functional blocks incorporate core logic for the entire IEEE repeater unit. The core logic blocks consist of a repeater receive multiplexor, a phase locked loop (PLL
/datasheets/files/national/pf/dp83953.html
National 17/02/2005 7.02 Kb HTML dp83953.html
eavesdropping and/or intrusion on a per port basis 58 On Chip CAMs (Content Addressable Memory) allow filter circuitry. The RIC2A repeater consists of two major functional blocks: The segment specific block and the shared functional blocks. The segment specific block incorporates relevant IEEE specifications on a per port basis. The shared functional blocks incorporate core logic for the entire IEEE repeater unit. The core logic blocks consist of a repeater receive multiplexor, a phase locked loop (PLL
/datasheets/files/national/htm/nsc01683-v5.htm
National 01/11/2002 15.29 Kb HTM nsc01683-v5.htm
standard PCI bus to build a wide array of Ethernet switching systems. This includes the may be used as building blocks for designing pure 100-Mbps switches and bridges." Ethernet Controllers (MACs), a full wire-speed switching engine, memory controller, and expensive content addressable memories (CAMs) and wrings the same performance from simple
/datasheets/files/scantec/galileo/www/news/4802_91696.htm
Scantec 20/04/1998 10.92 Kb HTM 4802_91696.htm
XAPP201 XAPP201 Virtex Content Addressable Memory (CAM) in ATM 70 KB XAPP056 XAPP056 XC4000 XC4000   Using SelectRAM Memory How Spartan Series FPGAs Compete for Gate Array Production 50 KB Using Block SelectRAM+ Memory in Spartan-II FPGAs v1.0 (01/00)    140 KB Data-Width Conversion FIFOs using the Virtex Block SelectRAM Memory   40 KB
/datasheets/files/xilinx/docs/rp00003/rp00319.htm
Xilinx 19/03/2000 192.75 Kb HTM rp00319.htm
manipulate tables and move blocks . A new memory management unit enlarges the memory space up to 4 calls stack use string String search search a 16-byte string in a 128- character array 8-bit data block manipulation string manipulation char Character search search a byte in a 40-byte array 8-bit data manipulation char manipulation bubble(n) (2) Bubble sort sort of a one-dimension array of n n-byte block from a place in memory to another 8-bit data block manipulation block move convert Block
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5039-v3.htm
STMicroelectronics 25/05/2000 91.27 Kb HTM 5039-v3.htm
16-bit data computation and manipulation , easily manipulate tables and move blocks . A new memory a 128- character array 8-bit data block manipulation string manipulation char Character search search a byte in a 40-byte array 8-bit data manipulation char manipulation bubble(n) (2) Bubble sort sort of a one-dimension array of n 16-bit integers 16-bit data manipulation integer manipulation blkmov(n) (3) Block move move a n-byte block from a place in memory to another 8-bit data block manipulation
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5039-v4.htm
STMicroelectronics 16/01/2001 100.55 Kb HTM 5039-v4.htm
16-bit data computation and manipulation , easily manipulate tables and move blocks . A new memory a 128- character array 8-bit data block manipulation string manipulation char Character search search a byte in a 40-byte array 8-bit data manipulation char manipulation bubble(n) (2) Bubble sort sort of a one-dimension array of n 16-bit integers 16-bit data manipulation integer manipulation blkmov(n) (3) Block move move a n-byte block from a place in memory to another 8-bit data block manipulation
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5039-v1.htm
STMicroelectronics 20/10/2000 100.65 Kb HTM 5039-v1.htm