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"alu 4 bit"

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Abstract: 16-bit, 32 instruction 20MHz ALU 16-bit, 20MHz Logical, Arithmetic or Barrel Shifter Independent ALU and Shifter Operation 4 x 16-bit On Chip Scratchpad Registers Multiprecision Operation; e.g , B CO MSB B MUX IA0-4 ALU S MUX CEB MSS 5 BARREL SHIFTER CI SHIFT , from the ALU is loaded into an internal 1 bit register, so that it is available as an input to the ALU , condition or a zero result. For the overflow condition to be 4 active the ALU result must have ... Zarlink Semiconductor
Original
datasheet

16 pages,
77.72 Kb

PDSP16318 18 x 16 barrel shifter AC84 barrel shifter block diagram Diode Mark ON B14 GC100 mara multiplexers 74 LS 150 PDSP1601 PDSP1601A PDSP16116 PDSP16112 32 bit barrel shifter circuit diagram PDSP1601/PDSP1601A PDSP1601/PDSP1601A 16 BIT ALU design with data sheet PDSP1601/PDSP1601A PDSP1601/PDSP1601A barrel shifter PDSP1601/PDSP1601A PDSP1601/PDSP1601A 4 bit barrel shift register datasheet PDSP1601/PDSP1601A PDSP1601/PDSP1601A 8 bit barrel shifter PDSP1601/PDSP1601A PDSP1601/PDSP1601A 4 bit barrel shifter PDSP1601/PDSP1601A PDSP1601/PDSP1601A 4 bit barrel shifter circuit diagram PDSP1601/PDSP1601A PDSP1601/PDSP1601A PDSP1601/PDSP1601A PDSP1601/PDSP1601A PDSP1601/PDSP1601A DS3705 TEXT
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Abstract: 64_62161_591 4* T- tt3 KSRC 3-bit value which exercises the /, and l0 source controls of the ALU A & B , €¢ Flexible Host and DMA Interfaces • Supports Single/Double Precision FPU • 2901 ALU Superset • 32-Bit ALU or 2 16-Bit ALUs • 2910 Sequencer Superset • 2Kb Data Cache • 3-Address Generators â , superset of the AMD 2901 as shown in Figures 2,3,4. Instructions to the ALU are supplied directly out of , cycle. Associated with the ALU is a 16 x 32-bit register file. The address lines lor the dual-ported ... OCR Scan
datasheet

12 pages,
656.86 Kb

16 bit alu circuit design 16 bit barrel shifter circuit diagram 512-by-1wit 8 BIT ALU design by cmos AMD 2910 by32B 12 bit alu circuit design M68XXX register file WTL3132 CRTN 1010 wtl3332 3332 weitek amd 2901 Kaaa WTL3164 weitek weitek FPU amd 2901 alu kbaa TEXT
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Abstract: ARCHITECTURE 3.1.1 Data ALU Input Registers (X1, X0, Y1, Y0) X1, X0, Y1, and Y0 are 16-bit latches which , , B1 and B0 are 16-bit latches which serve as data ALU accumulator registers. A2 and B2 are 8-bit , data ALU operations specify the 40-bit accumulator registers as source and/or destination operands The accumulator registers are treated as two 40-bit registers A (A2:A1:A0) and B (B2:B1:B0) for data ALU , output and supply a source accumulator of the same form. Most data ALU operations specify the 40-bit ... Motorola
Original
datasheet

20 pages,
80.1 Kb

modified booth circuit diagram block diagram 8 bit booth multiplier "saturation arithmetic" 8 bit booth multiplier TEXT
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Abstract: , 32 Instruction 20MHz ALU 16-bit, 20MHz Logical, Arithmetic or Barrel Shifter Independent ALU and Shifter Operation 4 x 16-bit On Chip Scratchpad Registers Multiprecision Operation; e.g. 200ns 64-bit , 12E` D ' ?22GS13 22GS13 0 0 1 0 0 4 5 t> Symbol MSB MSS Description ALU B-input multiplexer , into an internal 1 bit register, so that it is available as an input to the ALU on the next cycle. In , overflow condition to be active the ALU result must have overflowed into the 16th (sign) bit, (this flag Is ... OCR Scan
datasheet

18 pages,
1259 Kb

TEXT
datasheet frame
Abstract: 16-bit, 32 instruction 20MHz ALU 16-bit, 20MHz Logical, Arithmetic or Barrel Shifter Independent ALU and Shifter Operation 4 x 16-bit On Chip Scratchpad Registers Multiprecision Operation; e.g , B CO MSB B MUX IA0-4 ALU S MUX CEB MSS 5 BARREL SHIFTER CI SHIFT , from the ALU is loaded into an internal 1 bit register, so that it is available as an input to the ALU , condition or a zero result. For the overflow condition to be 4 active the ALU result must have ... Zarlink Semiconductor
Original
datasheet

16 pages,
88.26 Kb

PDSP16318 PDSP16116 PDSP16112 PDSP1601A PDSP1601 GC100 AC84 PDSP1601/PDSP1601A DS3705 TEXT
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Abstract: 4 of 19 http://www.Innovasic.com Customer Support: 1-888-824-4184 IA59032 IA59032 32-Bit , microprocessor that combines the functions of eight 2901 4-bit slice processors and distributed look-ahead carry , SOURCE I(8:0) INSTRUCTION BUS 2 3 4 ALU FUNCTION 5 6 7 MICROINSTRUCTION , 32-BIT ALU F Cn A OEn OVR OUTPUT DATA MUX Cn32 F Y(31:0) IA211001108 IA211001108 , by 32-bit 2-port RAM and the high-speed ALU. Data in any of the 32 words of the RAM can be read ... InnovASIC Semiconductor
Original
datasheet

19 pages,
315.63 Kb

IA59032 functional diagram of ALU using mux bit slice processors 4 BIT ALU IC 32X32 WS59032 TEXT
datasheet frame
Abstract: 16-bit, 32 instruction 20MHz ALU 16-bit, 20MHz Logical, Arithmetic or Barrel Shifter Independent ALU and Shifter Operation 4 x 16-bit On Chip Scratchpad Registers Multiprecision Operation; e.g , B CO MSB B MUX IA0-4 ALU S MUX CEB MSS 5 BARREL SHIFTER CI SHIFT , from the ALU is loaded into an internal 1 bit register, so that it is available as an input to the ALU , condition or a zero result. For the overflow condition to be 4 active the ALU result must have ... Zarlink Semiconductor
Original
datasheet

16 pages,
83 Kb

Shift register designed by Max Plus PDSP16318 PDSP16116 PDSP16112 PDSP1601A PDSP1601 GC100 bfp mark diode AC84 PDSP1601/PDSP1601A DS3705 TEXT
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Abstract: SN74AS8832 SN74AS8832 32'Bit Registered ALU • Compatible with AS888 AS888 architecture and instruction set • 3-port I/O architecture • Simultaneous ALU and register operations • 64-word by 36-bit , Description The 74AS8832 74AS8832 is a 32-bit registered ALU that can be configured to operate as four 8-bit ALUs, two 16-bit ALUs or a single 32-bit ALU. The processor's instruction set is 100 percent upwardly , U s -A-► Z,C,OVR,N BYOF3-BYOFO Figure 1. 32-Bit Registered ALU This Material Copyrighted By ... OCR Scan
datasheet

20 pages,
761.35 Kb

sn74as8832 AS888 AS8832 3 bit magnitude comparator register file SN74AS8832 TEXT
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Abstract: snnnnnnnnnnnnnnnnnnnnn^ 11 10 9 1 AC84 LC84 FEATURES 16-bit, 32 instruction 20MHz ALU 16-bit, 20MHz Logical, Arithmetic or Barrel Shifter Independent ALU and Shifter Operation 4 x 16-bit On Chip Scratchpad , Symbol MSB MSS B 1 5 - BO Pin No. (LC84 Package) 2 3 4 - 19 20 21 Description ALU B-input multiplexer , CEB CLK MS AO - MSA1 2 3 - 2 4 A 1 5 -A O 2 5 -4 0 41 42 4 3 -4 6 4 7 -5 0 ALU A-input , is loaded into an internal 1 bit register, so that it is available as an input to the ALU on the next ... OCR Scan
datasheet

19 pages,
1188.56 Kb

GG 26 HB3923-1 1601/PDSP TEXT
datasheet frame
Abstract: FEATURES s s s s s s s s 16-bit, 32 instruction 10MHz ALU 16-bit, 10MHz Logical, Arithmetic or Barrel Shifter Independent ALU and Shifter Operation 4 x 16-bit On Chip Scratchpad Registers , MSB B MUX IA0-4 ALU S MUX CEB MSS 5 BARREL SHIFTER CI SHIFT CONTROL , bit register, so that it is available as an input to the ALU on the next cycle. In the manner , provide flags indicating that the ALU result is within a factor of two or four of overflowing the 16 bit ... Mitel Semiconductor
Original
datasheet

18 pages,
141.16 Kb

00FF 16 BIT ALU design with data sheet 4 bit barrel shift register datasheet 8 bit barrel shifter design of priority encoder GC100 PDSP1601 barrel shifter 32 bit barrel shifter circuit diagram Shift register designed by Max Plus barrel shifter block diagram 4 bit barrel shifter 4 bit barrel shifter circuit diagram DS3763 TEXT
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