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LPO1704-472MB Coilcraft Inc 1 ELEMENT, 4.7uH, CERAMIC-CORE, GENERAL PURPOSE INDUCTOR, SMD, CHIP
LPO1704-472MLB Coilcraft Inc 1 ELEMENT, 4.7uH, CERAMIC-CORE, GENERAL PURPOSE INDUCTOR, SMD, ROHS COMPLIANT
LPO1704-473MLB Coilcraft Inc 1 ELEMENT, 47uH, CERAMIC-CORE, GENERAL PURPOSE INDUCTOR, SMD, ROHS COMPLIANT
LPO1704-473MC Coilcraft Inc 1 ELEMENT, 47uH, CERAMIC-CORE, GENERAL PURPOSE INDUCTOR, SMD, CHIP
LPO1704-472MC Coilcraft Inc General Purpose Inductor, 4.7uH, 20%, 1 Element, Ceramic-Core, SMD, CHIP
LPO1704-472MLC Coilcraft Inc General Purpose Inductor, 4.7uH, 20%, 1 Element, Ceramic-Core, SMD, ROHS COMPLIANT

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"Digital Delay Line" 0447

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: BEL FUSE INC DfiE D | 1351423 DOOQSOM 5 | 13 a degree of excellence DIGITAL DELAY LINE SERIES 0447 AND A447 CONTROLLED LEADING & TRAILING EDGE DELAY MODULE 5 TAP TECHNICAL INFORMATION TEST CONDITIONS 3.2 Volts 3.0 Nsec (10%-90%) 1.2 X Total Delay 4 X Pulse Width Ic c l 60.0 Milliamps max. Supply , Voltage 0.5 Volts max. Delay Tolerance From Input To Tap + 2 Nsec or 5% whichever is greater Delay , Operating Temperature Range 0°C To 70°C Temperature Coefficient Of Total Delay 500PPM/°C Typical Minimum -
OCR Scan
045REF 0447-0025-A1 050-A1 0447-0100-A1 0447-0150-A1 0447-0200-A1
Abstract: OQOOMaB 5 a degree of excellence DIGITAL DELAY LINE SE R IE S 0447 AND A447 LOW POWER MODULE 20MATYP 5 TAP/FIXED DELAY 0447 -.8 0 MAX.275 M A X _ I .12 MIN. I- -J .045 REF , Voltage Rise Time Pulse Width Pulse Period Supply Current, 3.2 Volts 3.0 Nsec 1.2 X Total Delay 4 X Pulse Width Ic c l Vcc \ Part * Number Delay/Tap 1,-3 Total Delay 1,3 , 0447-0300-09 0447-0350-09 0447-0400-09 5NS 10NS 80NS 90NS 100NS 8N S 8N S 8NS 0447 A447 -
OCR Scan
150NS 200NS 400NS 450NS 500NS 125NS
Abstract: BEL FUSE INC OSE D | 13S14SB 000QS03 3 | /defining a degree of excellence DIGITAL DELAY LINE SERIES 0447 AND A447 FIXED DELAY TECHNICAL INFORMATION 3.2 Volts 3.0 Nsec (10%-90%) 1.2 X Total Delay 4 X , '" Other delays and tolerances upon request 0447 A447 Vcc 14 o-Ei Part * Delay/Tap Rise, Time Number 1, 3 2 , 2,7 Volts min. Logic 0 Output Voltage 0.5 Volts max. Delay Tolerance From Input To Tap + 2 Nsec or 5 , °C Temperature Coefficient Of Total Delay 500PPM/°C Typical Minimum Input Pulse Width 40% Of Total Delay Maximum -
OCR Scan
0447-002 delay line 400ns 0447-0200-06 A447 175NS 250NS 300NS 350NS 432-0463/TWX 710-730-5301/FAX
Abstract: excellence DIGITAL DELAY LINE SERIES 0447 AND A447 10 TAP 0447 -.6 0 MAX. - TECHNICAL INFORMATION TEST CONDITIONS 3.2 Volts 3.0 Nsec (10%-90%) 1.2 X Total Delay 4 X Pulse Width I c c l 120.0 Milliamps max. Supply , Milliamp max. Logic 1 Output Voltage 2.7 Volts mln. Logic 0 Output Voltage 0.5 Volts max. Delay Tolerance From Input To Tap ± 2 Nsec or 5% whichever is greater Delay Tolerance From Tap To Tap ± 2 Nsec or 7 , °C Temperature Coefficient Of Total Delay 500PPM/°C Typical Minimum Input Pulse Width 40% Of Total Delay Maximum -
OCR Scan
0447-0750-10 0447-0150-10 0447-0200-10 0447-0250-10 0447-0400-10 L--30 18MAX 750NS 1000NS
Abstract: DIGITAL DELAY LINE SERIES 0447 AND A447 10 TAP TECHNICAL INFORMATION TEST CONDITIONS Pulse Voltage Rise Time Pulse Width Pulse Period Supply Current, Iccl 3.2 Volts 3.0 Nsec (10%-90%) 1.2 X Total Delay 4 X , Voltage 2.7 Volts min. Logic 0 Output Voltage 0.5 Volts max. Delay Tolerance From Input To Tap ±2 Nsec or 5% whichever is greater Delay Tolerance From Tap To Tap ±2 Nsec or 7% whichever is greater All , Of Total Delay 500PPM/°C Typical Minimum Input Pulse Width 40% Of Total Delay Maximum Duty Cycle 50 -
OCR Scan
0447-0050-10 0447-0500-10 0447-1000-10 0447-1000 0447-0300-10 0447-0100-10
Abstract: DELAY LINE SERIES 0447 AND A447 5 TAP 0447 A447 3 SPACES @ .2 0 .276 M AX. TECHNICAL INFORMATION TEST CONDITIONS 3.2 Volts 3.0 Nsec (10%-90%) 1.2 X Total Delay 4 X Pulse Width I c c l 60.0 Milliamps , . Logic 0 Output Voltage 0.5 Volts max, Delay Tolerance From Input To Tap ± 2 Nsec or 5% whichever is greater Delay Tolerance From Tap To Tap ± 2 Nsec or 7% whichever is greater All specified Performance , Volts Operating Temperature Range 0"C To 70'C Temperature Coefficient Of Total Delay 500PPM/°C Typical -
OCR Scan
0447-0250-02 0447-0200-02 0447-0050-02 0447-0500-02 000G5P1 T-47-/3
Abstract: BEL FUSE INC QBE D | 1351453 00005D1 0 | defining a degree of excellence T-m-13 DIGITAL DELAY LINE SERIES 0447 AND A447 5 TAP TECHNICAL INFORMATION 3.2 Volts 3.0 Nsec (10%-90%) 1.2 X Total Delay 4 X Pulse , Volts min. Logic 0 Output Voltage 0.5 Volts max, Delay Tolerance From Input To Tap ±2 Nsec or 5% whichever is greater Delay Tolerance From Tap To Tap ±2 Nsec or 7% whichever is greater All specified , , Vcc 4.75 to 5.25 Volts Operating Temperature Range 0°C To 70eC Temperature Coefficient Of Total Delay -
OCR Scan
0447-0100-02 0447-0150-02 0447-0450-02 25NS 0447-0400-02
Abstract: BEL FUSE INC OSE D | 1351453 DODOSOt. 1 | a degree of excellence DIGITAL DELAY LINE SERIES 0447 , X Total Delay 4 X Puise Width I c c l Constant " 0" in 115 mA max Constant " 1" in 90 mA max. Supply , , Vcc 4.75 to 5.25 Volts Operating Temperature Range 0°C to 70°C Temperature Coefficient of Total Delay 1200PPM/"C Typical Minimum Input Pulse Width 100% of Total Delay Maximum Duty Cycle 50% DRIVE CAPABILITIES , delays and tolerances upon request Vcc 14 o -M T-H1- 13 0447 A447 1 IN 12 3 Qi»T IN 10 -
OCR Scan
0447-0100-A3 0447-0010-A3 0447-0020-A3 0447-0030-A3 0447-0040-A3 0447-0050-A3 0447-0060-A3
Abstract: DIGITAL DELAY LINE SERIES 0447 AND A447 FIXED DELAY TECHNICAL INFORMATION TEST CONDITIONS 3.2 Volts 3.0 Nsec (10%-90%) 1.2 X Total Delay 4 X Pulse Width Ic c l 60.0 Milliamps max. Supply Voltage, Vcc 5.0 , Volts max. Delay Tolerance From Input To Tap ± 2 Nsec or 5% whichever is greater All specified , , Vcc 4.75 to 5.25 Volts Operating Temperature Range 0' C To 70°C Temperature Coefficient Of Total Delay 500PPM/"C Typical Minimum Input Pulse Width 40% Of Total Delay Maximum Duty Cycle 50% DRIVE CAPABILITIES -
OCR Scan
0447-0020-06 13S14BB
Abstract: BEL FUSE INC DAE D | 13S14B3 DD00S07 0 | a degree of excellence DIGITAL DELAY LINE SER IE S 0447 SINGLE-IN-LINE 10 TAP TECHNICAL INFORMATION TEST CONDITIONS Pulse Voltage Rise Time Pulse Width Pulse Period Supply Current, 3.2 Volts 3.0 Nsec (10%-90%) 1.2 X Total Delay 4 X Pulse Width Ic c l 120.0 , Volts min. Logic 0 Output Voltage 0.5 Volts max. Delay Tolerance From Input To Tap ± 2 Nsec or 5 % whichever is greater Delay Tolerance From Tap To Tap ± 2 Nsec or 7 % whichever is greater All specified -
OCR Scan
Abstract: DELAY LINE SE R IE S 0447 LOW POWER MODULE 20 MA TYP 5 TAP/FIXED DELAY TECHNICAL INFORMATION TEST CONDITIONS 3.2 Volts 3.0 Nsec (10%-90%) 1.2 X Total Delay 4 X Pulse Width Ic c l 20.0 Milliamps max. Supply , Output Voltage 0.5 Volts max. Delay Tolerance From Input To Tap + 2 Nsec or 5 % whichever is greater Delay Tolerance From Tap To Tap ± 2 Nsec or 7 % whichever is greater All specified Performance , Volts Operating Temperature Range 0°C To 70°C Temperature Coefficient Of Total Delay 500PPM/°C Typical -
OCR Scan
0447-0070 0447-0500-09 13S14E3 D000S05
Abstract: Vrefh Vref(-) Vrefh Vp-p Input Capacitance5 C|n 20 pF Aperture Delay W 15 ns Aperture , -10 10 -15 15 ha V0uT=GNDtoVDD Data Enable Delay tden 18 22 25 ns Data 3-state Delay Idhz 18 22 , logical level. 9 Condition to meet aperture delay specifications (tAp, tAj). Actual rise/fall time can be , DATA High Z < valid lden ' High z ' Idhz Figure 2. Data Line Enable Delay TM M P7682/XR , the CLK input marks the end of the sampling phase (s)- Internal delay of the clock circuitry will -
OCR Scan
t04 68 3 pin diode MP7682JN MP7682JS MP7682KN MP7682KS XRD7682AIK18-J MP7682/XRD7682 P7682/X D7682
Abstract: during the valid strobe period. There is no frame delay through the PCM serial circuit for synchronous , since the bit cell period at 128 kb/s and 256 kb/s is relatively large. There is a one frame delay , 3000 - 3400 Hz 4000 Hz >4600 Hz GRX 7 Absolute Delay DAX 360 us at frequency of minimum delay 8 Group Delay relative to DAX DDX 750 380 130 750 us us us us , - 3400 Hz 4000 Hz >4600 Hz GRR 7 Absolute Delay DAR 240 us at frequency of Zarlink Semiconductor
Original
MT9162 MT9162AE MT9162AS MT9162AN ic 7812 pin diagram iso 7812 mcl 0 714 MT8972 DS5178
Abstract: frame delay through the PCM serial circuit for synchronous operation. For asynchronous operation Dout , bit cell period at 128 kb/s and 256 kb/s is relatively large. There is a one frame delay through the , 300 - 3000 Hz 3000 - 3400 Hz 4000 Hz >4600 Hz Absolute Delay Group Delay relative to DAX GAX1 GTX 5.2 , dB dB dB dBrnC0 dBm0p dB dB dB dB dB dB dB us us us us us at frequency of minimum delay 500-600 Hz , 3000 Hz 3000 - 3400 Hz 4000 Hz >4600 Hz Absolute Delay Group Delay relative to DAR Sym ALo3.17 ALo3 Zarlink Semiconductor
Original
Abstract: frame delay through the PCM serial circuit for synchronous operation. For asynchronous operation Dout , bit cell period at 128 kb/s and 256 kb/s is relatively large. There is a one frame delay through the , 300 - 3000 Hz 3000 - 3400 Hz 4000 Hz >4600 Hz Absolute Delay Group Delay relative to DAX GAX1 GTX 5.2 , dB dB dB dBrnC0 dBm0p dB dB dB dB dB dB dB us us us us us at frequency of minimum delay 500-600 Hz , 3000 Hz 3000 - 3400 Hz 4000 Hz >4600 Hz Absolute Delay Group Delay relative to DAR Sym ALo3.17 ALo3 Zarlink Semiconductor
Original
Abstract: frame delay through the PCM serial circuit for synchronous operation. For asynchronous operation Dout , bit cell period at 128 kb/s and 256 kb/s is relatively large. There is a one frame delay through the , 4000 Hz 4600 Hz >4600 Hz Absolute Delay Group Delay relative to DAX GAX1 GTX 5.4 -0.3 -0.6 -1.6 35 29 , dB dB dBrnC0 dBm0p dB dB dB dB dB dB dB dB dB dB us us us us us at frequency of minimum delay 500-600 , 3300 Hz 3400 Hz 4000 Hz 4600 Hz >4600 Hz Absolute Delay Group Delay relative to DAR Sym ALo3.17 ALo3 Zarlink Semiconductor
Original
MT91L62 DS5179 MT91L62AE MT91L62AS MT91L62AN
Abstract: frame delay through the PCM serial circuit for synchronous operation. For asynchronous operation Dout , bit cell period at 128 kb/s and 256 kb/s is relatively large. There is a one frame delay through the , 4000 Hz 4600 Hz >4600 Hz Absolute Delay Group Delay relative to DAX GAX1 GTX 5.4 -0.3 -0.6 -1.6 35 29 , dB dB dBrnC0 dBm0p dB dB dB dB dB dB dB dB dB dB us us us us us at frequency of minimum delay 500-600 , 3300 Hz 3400 Hz 4000 Hz 4600 Hz >4600 Hz Absolute Delay Group Delay relative to DAR Sym ALo3.17 ALo3 Zarlink Semiconductor
Original
IC 714
Abstract: period. There is no frame delay through the PCM serial circuit for synchronous operation , bit cell period at 128 kb/s and 256 kb/s is relatively large. There is a one frame delay through the , Hz 3000-3300 Hz 3300 Hz 3400 Hz 4000 Hz 4600 Hz >4600 Hz GRX 7 Absolute Delay DAX 360 us at frequency of minimum delay 8 Group Delay relative to DAX DDX 750 380 , Absolute Delay DAR 240 us at frequency of min. delay 8 Group Delay relative to DAR DDR Zarlink Semiconductor
Original
Abstract: propagation delay Receive Rise Time Receive Fall Time 219 48 50 488 648 50 52 % ns T5 50 ns , 0.009 0.447 0.291 MAX 0.104 0.012 0.020 0.013 0.463 0.299 MILLIMETERS MIN 2.35 0.10 0.33 0.23 11.35 -
OCR Scan
coupling capacitive voltage transformer XRT5791 XR-T5791 XR-T5794 XR-T5793
Abstract: Disable (Note 3) AC CHARACTERISTICS Driver Propagation Delay (TTL to EIA / TIA-562) Receiver Propagation Delay (EIA / TIA-562 to TTL) 0.8 q ­ 10V VIN 10V Output Low, IOUT = ­ 1.6mA (VCC = , . Driver Propagation Delay Timing VCC Figure 2. Receiver Propagation Delay Timing 5 LTC1385 , (millimeters) unless otherwise noted. S Package 18-Lead Plastic SOL 0.447 ­ 0.463 (11.354 ­ 11.760) (NOTE Linear Technology
Original
LT1180A LT 1385 LTC1385CG LTC1385CN LTC1385CS EIA/TIA-562 SOL18
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