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"Delay Modules"

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: .3 QPL Active Delay Modules (TTL) . 4 High-Performance TTL and Fast Delay Modules. 5 High-Speed Delay Modules .6 Standard-Performance TTL Delay Delay Delay Modules .10 100K ECL ... OCR Scan
datasheet

1 pages,
37.66 Kb

"Delay Modules" Delay Modules TEXT
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Abstract: . For an in p u t level o f 3.5V , in p u t current is approxim ately 4ma on modules w ith a delay change o f 1 to 5ns per step and approx im ately +17ma on modules w ith a delay change o f 6 to 10ns per , the in p u t pin. * * A ll delay times after step zero are referenced to step zero. 0 A II modules can , programmable Active Digital Delay Modules in SIP, DIP, Standard, Mini-DIP, Thinny-DIP, Hermetically Sealed , la»profile t 2l COMPATIBL 3-BIT PROGRAMMABLE LOGIC DELAY LINE # # # # # T2|_ input and ... OCR Scan
datasheet

4 pages,
294.03 Kb

PTTLDL TEXT
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Abstract: output without inversion. On modules with delay change of 1 to 8ns/step, input impedance is approximately 9 0 0 ohms; on modules with delay change of 9ns/step and greater, input impedance is approximately , zero. 0 A ll modules can be operated w ith a m inim um input pulse w idth o f 40% of fu ll delay and , Lines -fixed, tapped, multiple and programmable Active Digital Delay Modules in SIP, DIP, Standard , lowprofile ECL COMPATIBLE 4-BIT RAMMABLE DELAY LINE # # # # # ECL input and output levels ... OCR Scan
datasheet

4 pages,
382.24 Kb

PECLDL delay line 400ns TEXT
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Abstract: programmable 0 Active Digital Delay Modules in SIP, DIP, Standard, Mini-DIP, Thinny-DIP, Hermetically Sealed , lowprofile t2 l COMFATIBLE 8-BIT PROGRAMMABLE LOGIC DELAY LINE T 2 l input and output Delays stable and precise 64-pin D IP package (.250 high) Available in delays up to 1295ns Available in 5 delay , elements. The ICs utilized in these modules are burned-in to Level B o f M IL-STD -883 to ensure a high M TBF. The MTBF on these modules, when calculated per M IL-H D B K -217 fo r a 50°C ground fix e d ... OCR Scan
datasheet

4 pages,
348.47 Kb

TEXT
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Abstract: current is approxim ately 4ma on modules w ith a delay change of 1 to 5ns per step, approximately 17ma on modules w ith a delay change of 6 to 10ns per step and approxim ately 20ma on modules w ith a delay change , . 0A II modules can be operated w ith a minimum input pulse w id th of 4 0 % of full delay and pulse , Lines-fixed, tapped, multiple and programmable # Active Digital Delay Modules in SIP, DIP, Standard, Mini-DIP , lewprofile t2 l COMPATIBLE 3-BIT LEADLESS P CARRIER RAMMABLE DELAY LINE Full Military ... OCR Scan
datasheet

4 pages,
376.67 Kb

LCPDLTTL7-50M TEXT
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Abstract: approxim ately 4 m a on modules w ith a delay change of 1 to 5ns per step, approxim ately 17m a on modules w ith a delay change of 6 to 10ns per step and approxim ately 2 0 m a on modules w ith a delay , modules can be operated w ith a minim um input pulse w id th of 4 0 % of full delay and pulse period , lowprofile t2 l COMPATIBLE 3-BIT LEADLESS CHIP CARRIER PROGRAMMABLE LOGIC DELAY LINE T^L input , 357ns Available in 22 Delay steps with resolution from 1 to 50ns Propagation delays fully compensated ... OCR Scan
datasheet

4 pages,
370.41 Kb

TEXT
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Abstract: Delay Modules in SIP, DIP, Standard, Mini-DIP, Thinny-DIP, Hermetically Sealed, Wee DIP Surface Mount , lowprofile ECL COMPATIBLE 6-BIT PROGRAMMABLE LOGIC DELAY LINE # # # # # ECL input and , Available in 5 delay steps with resolution from 1 to 5ns # # # Propagation delays fully compensated All , Logic Delay Line to V cc; the Logic Delay Line may also be programmed autom atically by com puter generated data. MUX set-up tim e is 2ns typical. W hen no need exists in the application to change delay tim ... OCR Scan
datasheet

4 pages,
294.93 Kb

TEXT
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Abstract: , tapped, multiple and programmable Active Digital Delay Modules in SIP, DIP, Standard, Mini-DIP , lôwprofilt NCED CMOS T' L PROGRAMMABLE DELAY LINE INCLUDING INPUT DRIVER 0 # # # # # # # # , package (.2 4 0 high) Available in delays up to 358ns Available in 2 2 delay steps with resolution from 1 , capacity The Logic Delay Lines are digitally programmable by the presence of either a " 1 " or a " 0 " at , ; the Logic Delay Line may also be programmed autom atically by com puter generated data. 3ns typical ... OCR Scan
datasheet

4 pages,
215.4 Kb

t814 TEXT
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Abstract: ll delay times after step zero are referenced to step zero. 0 A ll modules can be operated w ith a m , programmable Active Digital Delay Modules in SIP, DIP, Standard, Mini-DIP, Thinny-DIP, Hermetically Sealed, Wee , lowprofile ECL COMPATIBL 8-BIT PROGRAMMABLE LOGIC DELAY LINE ECL input and output levels , 5 delay steps w ith resolution from 1ns to 5ns Propagation delays fu lly compensated All delays , Logic Delay Line to Vcc; the Logic Delay Line may also be programmed autom atically by com puter ... OCR Scan
datasheet

4 pages,
197.82 Kb

delay line 400ns TEXT
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Abstract: the o utp ut w ith o u t inversion. On modules w ith delay change of 1 to 8ns/step, input impedance is approxim ately 9 0 0 ohms; on modules w ith delay change of 9ns/step and greater, input impedance is , pin. * * All delay times after step zero are referenced to step zero. 0 A ll modules can be operated w , tapped Active Digital Delay Lines-fixed, tapped, multiple and programmable Active Digital Delay Modules , Istfprofile ECL COMPATIBLE 3-BIT PROGRAMMABLE LOGIC DELAY LINE ECL input and output levels ... OCR Scan
datasheet

4 pages,
361.7 Kb

TEXT
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