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Part Manufacturer Description PDF Samples Ordering
SN65LVDS051DR Texas Instruments Dual LVDS Transmitter/Receiver 16-SOIC -40 to 85 pdf Buy
SN65LVDS051PWG4 Texas Instruments Dual LVDS Transmitter/Receiver 16-TSSOP -40 to 85 pdf Buy
SN65LVDS051D Texas Instruments Dual LVDS Transmitter/Receiver 16-SOIC -40 to 85 pdf Buy Buy

"DUAL LVDS"

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGA 3.3V Dual Pixel LVDS Display Interface (LDI)-SVGA , LVDS FIGURE 16. Resistor Network for " DUAL "pin input - recommend using R1 R2 10k for , www.national.com/jpn/ DS90C387/DS90CF388 DS90C387/DS90CF388 LVDS DS90C387/DS90CF388 DS90C387/DS90CF388 LVDS ( ) TABLE 3. DUAL , to LVDS but map and text (JFG) Text edits to APP INFO section (JFG) Change ESD 388 - EIAJ from 250V 200V. Added more info in Apps info section regarding single to dual pixel support. Change ODD and ... National Semiconductor
Original
datasheet

26 pages,
1128.87 Kb

AN1127 an1059 dual pixel lvds lcd 40 pin diagram lvds AN-1127 DS90CF388 DS90C387 AN-1163 AN-1059 lcd 30 pin diagram lvds TEXT
datasheet frame
Abstract: Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGA 3.3V Dual Pixel LVDS Display Interface (LDI)-SVGA , LVDS FIGURE 16. Resistor Network for " DUAL "pin input - recommend using R1 R2 10k for , www.national.com/jpn/ DS90C387/DS90CF388 DS90C387/DS90CF388 LVDS DS90C387/DS90CF388 DS90C387/DS90CF388 LVDS ( ) TABLE 3. DUAL , to LVDS but map and text (JFG) Text edits to APP INFO section (JFG) Change ESD 388 - EIAJ from 250V 200V. Added more info in Apps info section regarding single to dual pixel support. Change ODD and ... National Semiconductor
Original
datasheet

26 pages,
1137.15 Kb

lcd 40 pin diagram lvds lcd 30 pin diagram lvds dual lvds ttl DS90CF388 DS90C387 AN-1163 AN-1127 AN-1059 TEXT
datasheet frame
Abstract: ADC1210S ADC1210S series ADC1210S065/DB ADC1210S065/DB ADC1210S065 ADC1210S065 demo board; both CMOS and LVDS ADC1210S065F1/DB ADC1210S065F1/DB , ADC1415S065/DB ADC1415S065/DB ADC1415S065 ADC1415S065 demo board; both CMOS and LVDS outputs ADC1415S065F1/DB ADC1415S065F1/DB ADC1415S065 ADC1415S065 demo , on board; LVDS output only SAMTEC connector ADC1415S065F2/DB ADC1415S065F2/DB ADC1415S065 ADC1415S065 demo board; SPI, Regulators on board; LVDS output only SAMTEC connector ADC1210S080 ADC1210S080 demo board; both CMOS and LVDS ADC1415S080/DB ADC1415S080/DB ADC1415S080 ADC1415S080 demo board; both CMOS and LVDS outputs ADC1210S080 ADC1210S080 demo board; CMOS version ... NXP Semiconductors
Original
datasheet

2 pages,
110.11 Kb

LVDS connector HVQFN64 ADC1010S080 ADC1415S080 ADC0808D ADC0808D250 samtec connector TEXT
datasheet frame
Abstract: 16 / 27 LVDS Output Data Mapping Dual Link / Single Link LVDS Data Output R1n,B1n n=07 VDD , -11 LVDS Output Data Mapping 17 / 27 LVCMOS Data Inputs Timing in Dual Link Dual-in / Dual-out Mode (MODE=LL , FLIP=L) Table 11 : LVCMOS Data Inputs Timing Diagrams in Dual Link 1st Pixel Data LVDS , Inputs Timing Diagrams in Dual Link Dual-in / Dual-out Mode (MODE=LL, FLIP=L, MAP=H) LVDS Data , Inputs Timing Diagrams in Dual Link LVDS Mapping Mode1 Mapping Mode2 Output Data (Input Pin Name ... ROHM
Original
datasheet

28 pages,
945.22 Kb

diode td13 diode td15 Diode Mark B12 BU7988KVT TEXT
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Abstract: Te x a s DS90C187 DS90C187 In s tr u m e n ts Low Power 1.8V Dual Pixel FPD-Link (LVDS) Serializer , to one channel of 4D+C LVDS data stream. In single pixel in / dual pixel out mode, the device can , ) 2 Channels FPD-Link (LVDS) (4 Data + Clock) Single Pixel In Dual Pixel Out (SIDO) Mode , Incorporated 301516 SNLS401A SNLS401A www.ti.com DS90C187 DS90C187 L w Power 1.8V Dual Pixel FPD-Link (LVDS) Serializer , m ' FIGURE 15. Dual Pixel / 18bpp LVDS Mapping A Single Pixel / 1 8bpp mode is also ... OCR Scan
datasheet

21 pages,
379.9 Kb

DS90C187 TEXT
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Abstract: -64 Fanout Buffer/Translator. SY89828L SY89828L Dual 1:10 LVPECL/LVDS LVDS 3.3V 1 TQFP-64 TQFP-64 Fanout Buffer/Translator. SY89829u Dual 1:10 LVPECL/LVDS LVPECL 2.5/3.3V 2 TQFP , Dual 2:1 ANY LVDS 2.5V 3.2 4 MLF-32 MLF-32 Fast Edge Rates and Internal Termination. SY89543L SY89543L Dual 2:1 ANY LVDS 3.3V 3.2 3 MLF-32 MLF-32 Fast Edge Rates and Internal , 3 MSOP-10 MSOP-10 Single SY55855V SY55855V ANY LVDS 3.3/5V 0.75 MSOP-10 MSOP-10 Dual SY55857L SY55857L ... Micrel Semiconductor
Original
datasheet

8 pages,
95.52 Kb

SY89547 100ept22 MLF16 SOIC8 single SY58011U SY58012U SY58013U SY58032U SY58020U SY58021U SY58022U SY58031U SY89222L SY58017 100EPT21 100EPT23L 100EPT23 4x4 mlf TEXT
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Abstract: „¢, as well as LVCMOS and LVDS DDR. NXP’s high-speed digital-to-analog converters (DACs) and , rates from 20 to 200 Msps, an optional input buffer, and low-voltage CMOS, LVDS/DDR, or JEDEC JESD204A JESD204A , from 10 to 16 bits, output samples rates from 125 Msps to 1.25 Gsps, and low-voltage CMOS, LVDS/DDR , a high-speed 14-bit dual channel DAC with selectable 2x, 4x, or 8x interpolation filters optimized , modes, on-chip bypassable PLL, SPI interface for control and status monitoring, dual 10-bit auxiliary ... NXP Semiconductors
Original
datasheet

8 pages,
452.03 Kb

JESD204A/JESD204B TEXT
datasheet frame
Abstract: THC63LVD1027 THC63LVD1027_Rev.2.0_E THC63LVD1027 THC63LVD1027 85MHz 10Bits Dual LVDS Repeater General Description Features The THC63LVD1027 THC63LVD1027 LVDS(Low Voltage Differential Signaling) repeater is designed to support , receives the dual channel LVDS data streams and transmits the LVDS data through various line rate , channel. • • • • • • Up to 85MHz 10bit dual channel LVDS Receiver Up to 85MHz 10bit dual channel LVDS Transmitter Wide LVDS input skew margin: ± 480ps at 75MHz Accurate LVDS ... THine Electronics
Original
datasheet

22 pages,
340.16 Kb

THC63LVD1027 TEXT
datasheet frame
Abstract: DS90C187 DS90C187 Low Power 1.8V Dual Pixel FPD-Link (LVDS) Serializer April 25, 2012 DS90C187 DS90C187 Low Power 1.8V Dual Pixel FPD-Link (LVDS) Serializer General Description The DS90C187 DS90C187 is a Low Power , converts one bank of 24 bit RGB data to one channel of 4D+C LVDS data stream. In single pixel in / dual , +C LVDS streams at half the pixel clock rate. In dual pixel in / dual pixel out mode, the device can , applications supporting either 24bpp or 18bpp color depths. In the Dual Pixel / 24bpp mode, eight LVDS data ... Texas Instruments
Original
datasheet

20 pages,
1347.39 Kb

old ferrite ER6 SIZE LVDS display tcon DS90C187 TEXT
datasheet frame
Abstract: DS90C187 DS90C187 Low Power 1.8V Dual Pixel FPD-Link (LVDS) Serializer April 25, 2012 DS90C187 DS90C187 Low Power 1.8V Dual Pixel FPD-Link (LVDS) Serializer General Description The DS90C187 DS90C187 is a Low Power , converts one bank of 24 bit RGB data to one channel of 4D+C LVDS data stream. In single pixel in / dual , +C LVDS streams at half the pixel clock rate. In dual pixel in / dual pixel out mode, the device can , applications supporting either 24bpp or 18bpp color depths. In the Dual Pixel / 24bpp mode, eight LVDS data ... Texas Instruments
Original
datasheet

21 pages,
1367.65 Kb

tcon with lvds input lvds switch lcd 7" 18-bit digital INA27 B27 QFN T-CON BOARD diagrams DS90C187 TEXT
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Archived Files

Abstract Saved from Date Saved File Size Type Download
MAX9111/MAX9113 MAX9111/MAX9113 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 MAX9113 MAX9113 is a dual LVDS receiver. Both devices conform to the EIA/TIA-644 EIA/TIA-644 LVDS standard and convert and SO packages. Refer to the MAX9110/ MAX9110/ MAX9112 MAX9112 data sheet for single/dual LVDS line drivers. E-MAIL as a PDF attachment. General Description The MAX9111/MAX9113 MAX9111/MAX9113 single/dual low-voltage differential signaling (LVDS) receivers are designed for high-speed applications requiring minimum power
/datasheets/files/maxim/0011/quick051.htm
Maxim 04/04/2001 6.51 Kb HTM quick051.htm
MAX9110/MAX9112 MAX9110/MAX9112 Single/Dual LVDS Line Drivers with Ultra-Low Pulse Skew in SOT23 MAX9112 MAX9112 is a dual LVDS transmitter. Both devices conform to the EIA/TIA-644 EIA/TIA-644 LVDS standard. They accept 8-pin SOT23 and SO packages. Refer to the MAX9111/ MAX9111/ MAX9113 MAX9113 data sheet for single/dual LVDS line E-MAIL as a PDF attachment. General Description The MAX9110/MAX9112 MAX9110/MAX9112 single/dual low-voltage differential signaling (LVDS) transmitters are designed for high-speed applications requiring minimum power
/datasheets/files/maxim/0011/quick050.htm
Maxim 04/04/2001 6.56 Kb HTM quick050.htm
LVDS Inputs/Dual RSDS Outputs for TFT-LCD Monitor and Notebook   Products Folder +3.3V TFT-LCD Timing Controller for Dual LVDS Inputs/Dual RSDS Outputs for Dual LVDS Inputs Dual RSDS™ Outputs for TFT-LCD Monitor and Notebook (SXGA SXGA+ UXGA) 1980 Kbytes controller that combines an LVDS dual pixel input interface with National's Reduced Swing Differential 6 or 8 bit LVDS dual pixel input interface (FPD-Link) Virtual 8-bit color depth in FRC mode
/datasheets/files/national/pf/fpd87392.html
National 17/02/2005 10.68 Kb HTML fpd87392.html
Dual LVDS Inputs/Dual RSDS Outputs for TFT-LCD Monitor and Notebook [Life-time buy LVDS Inputs/Dual RSDS Outputs for TFT-LCD Monitor and Notebook [Life-time buy] Generic P/N Download Receive via Email FPD87392AXA FPD87392AXA +3.3V TFT-LCD Timing Controller with Dual LVDS Inputs Dual customer supplied VHDL/Verilog code. The FPD87392AXA FPD87392AXA is a timing controller that combines an LVDS dual column driver up to 170 Mb/s with an 85 MHz clock 6 or 8 bit LVDS dual pixel input interface (FPD-Link
/datasheets/files/national/pf/fpd87392axa.html
National 17/02/2005 8.7 Kb HTML fpd87392axa.html
MAX9110/MAX9112 MAX9110/MAX9112 Single/Dual LVDS Line Drivers with Ultra-Low Pulse Skew in SOT23 QV MAX9111/MAX9113 MAX9111/MAX9113 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23  
/datasheets/files/maxim/0006/pr_qv002.htm
Maxim 04/04/2001 6.2 Kb HTM pr_qv002.htm
Controller for Dual LVDS Inputs/Dual RSDS Outputs for TFT-LCD Monitor and Notebook Generic P/N Controller with Dual LVDS Inputs Dual RSDS Outputs for TFT-LCD Monitor and Notebook (SXGA SXGA+ UXGA) 134 /Verilog code. The FPD87392AXA FPD87392AXA is a timing controller that combines an LVDS dual pixel input interface Mb/s with an 85 MHz clock 6 or 8 bit LVDS dual pixel input interface (FPD-Link) Virtual 8-bit reduced system dynamic power consumption. The RSDS™ dual 12 pair differential bus conveys up to 24-bit
/datasheets/files/national/fpd87392axa.html
National 25/09/2003 10.44 Kb HTML fpd87392axa.html
FPD87392AXA FPD87392AXA  Product Folder +3.3V TFT-LCD Timing Controller for Dual LVDS Inputs/Dual RSDS Outputs Receive via Email FPD87392AXA FPD87392AXA +3.3V TFT-LCD Timing Controller with Dual LVDS Inputs Dual RSDS Outputs supplied VHDL/Verilog code. The FPD87392AXA FPD87392AXA is a timing controller that combines an LVDS dual pixel column driver up to 170 Mb/s with an 85 MHz clock 6 or 8 bit LVDS dual pixel input interface (FPD-Link lowering radiated EMI and reduced system dynamic power consumption. The RSDS™ dual 12 pair differential bus
/datasheets/files/national/fpd87392.htm
National 27/02/2004 8.64 Kb HTM fpd87392.htm
4.1 4.1 22 SN75176 SN75176 2.53 SN65LVDT34 SN65LVDT34 Dual LVDS/PECL Receiver 2 4 50 3.3 6 23 AM26LS32 AM26LS32 2.53 SN65LVDS34 SN65LVDS34 Dual LVDS 2.6 7 SN65LVDS2 SN65LVDS2 0.76 SN65LVDS22 SN65LVDS22 Dual Multiplexed LVDS Repeater 2 2 5.3 6.5 130 SN65LVDM320 SN65LVDM320 7.28 SN65LVDM22 SN65LVDM22 Dual Multiplexed LVDS Repeater Master Product Index Keyword Search Web Links LVDS Device
/datasheets/files/texas-instruments/docs/html/tables/lvds_6.html
Texas Instruments 03/07/2002 63.85 Kb HTML lvds_6.html
27 MC34051 MC34051 2.53 SN65LVDM22 SN65LVDM22 Dual Multiplexed LVDS Repeater 2 2 50 Dual Multiplexed LVDS Repeater 2 2 100 +/-100 3.3 4 20 SN65LVDS22 SN65LVDS22 3.3 2.6 70 SN65LVDT386 SN65LVDT386 6.34 SN65LVDS34 SN65LVDS34 Dual LVDS/PECL Receiver SN65LVDS9637 SN65LVDS9637 2.36 SN65LVDT34 SN65LVDT34 Dual LVDS/PECL Receiver 2 50 3.3 Master Product Index Keyword Search Web Links LVDS Device
/datasheets/files/texas-instruments/docs/html/tables/lvds_2.html
Texas Instruments 03/07/2002 63.85 Kb HTML lvds_2.html
SN65LVDT34 SN65LVDT34 Dual LVDS/PECL Receiver 2 50 3.3 6 12 uA9637 ) Receiver tpd (ns) ICC (max) (mA) Footprint Price* SN65LVDS34 SN65LVDS34 Dual LVDS/PECL 3.04 SN65LVDM22 SN65LVDM22 Dual Multiplexed LVDS Repeater 2 2 50 +/-100 3.3 Master Product Index Keyword Search Web Links LVDS Device (max) (mA) Footprint Price* SN65LVDS105 SN65LVDS105 LVDS Clock Buffer w/LVTTL Input
/datasheets/files/texas-instruments/docs/html/tables/lvds_7.html
Texas Instruments 03/07/2002 63.85 Kb HTML lvds_7.html