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HPA00022RGQ8 Texas Instruments D FLIP-FLOP pdf Buy Buy
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"D Flip Flop"

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Abstract: PSoC CreatorTM Component Datasheet ® D Flip Flop w/ Enable 1.0 Features Enable input , enable. General Description The D Flip Flop w/ Enable selectively captures a digital value. When to Use a D Flip Flop w/ Enable Use the D Flip Flop w/ Enable to implement sequential logic. Input/Output Connections This section describes the various input and output connections for the D Flip Flop w , 95134-1709 · 408-943-2600 Document Number: 001-84897 Rev. * Revised November 28, 2012 D Flip Flop w ... Cypress Semiconductor
Original
datasheet

3 pages,
108.49 Kb

"D Flip Flops" D Flip Flops TEXT
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Abstract: the AC. INTERNAL DEVICE CONTROLLER FLIP FLOP DEFINITIONS: There are five device controllers , : FLAG FLIP FLOP - Internal device control status flip flop which only has meaning if the IS programming , the IS programming bit is 0, the flag flip flop is held in the cleared state. FLAG SAMPLE FLIP FLOP - Internal device control flip flop which samples the state of the flag flip flop at the falling edge of LXDAR. The set state of this flip flop causes the skip line to be pulled and the flag flip flop to be ... OCR Scan
datasheet

8 pages,
636.13 Kb

harris 6121 D flip flop IC 6121 harris 6121 T flip flop IC CMOS T flip flop IC no T flip flop IC HD-6121 TEXT
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Abstract: PSoC CreatorTM Component Datasheet ® D Flip Flop 1.20 Features Asynchronous reset or , width General Description The D Flip Flop stores a digital value. When to Use a D Flip Flop Use the D Flip Flop to implement sequential logic. Input/Output Connections This section describes the various input and output connections for the D Flip Flop. An asterisk (*) in the list of I/Os states that , Revised June 20, 2012 D Flip Flop PSoC CreatorTM Component Datasheet ® of the clock signal ... Cypress Semiconductor
Original
datasheet

4 pages,
153.72 Kb

D Flip Flops TEXT
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Abstract: PSoC CreatorTM Component Datasheet ® D Flip Flop 1.30 Features Asynchronous reset or , Description The D Flip Flop stores a digital value. When to Use a D Flip Flop Use the D Flip Flop to , connections for the D Flip Flop. An asterisk (*) in the list of I/Os states that the I/O may be hidden on the , 95134-1709 · 408-943-2600 Document Number: 001-84971 Rev. * Revised December 3, 2012 D Flip Flop PSoC , Output The stored value of the D Flip Flop. Component Parameters Drag a D Flip Flop onto your design ... Cypress Semiconductor
Original
datasheet

5 pages,
161.13 Kb

"D Flip Flops" D flip flop D Flip Flops 4 input d flip flop TEXT
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Abstract: * MCC978 MCC978 Dual Type D Flip Flop 49 D 45 x 73 MCC779 MCC779 MCC879 MCC879 MCC979 MCC979 J-K Fiip Flop, 1 Expander, 2 Buffers 2MK , 32 x 34 MCC702 MCC702 MCC802 MCC802 MCC902 MCC902 R-S Flip Flop 6ML 25 x 30 MCC703 MCC703 MCC803 MCC803 MCC903 MCC903 3-lnput NOR Gate 2MH 25 , Flip Flop 1JD 48 x 57 MCC714 MCC714 MCC814 MCC814 MCC914 MCC914 Dual 2-lnput NOR Gate 9KM 30 x 37 MCC715 MCC715 MCC815 MCC815 MCC915 MCC915 Dual 3-lnput NOR Gate IMF 35 x 33 Not Avail. MCC816 MCC816 MCC916 MCC916 J-K Flip Flop 78M 43 x 43 MCC717 MCC717 MCC817 MCC817 , MCC819 MCC819* MCC919 MCC919 Dual 4-lnput NOR Gate 1MF 35 x 33 MCC720 MCC720 MCC820 MCC820" MCC920 MCC920 J-K Flip Flop 810 60 x 60 MCC721 MCC721 ... OCR Scan
datasheet

2 pages,
119.16 Kb

MCC1741C quad jk flip flop MCC701 MCC977 MCC775 MCC783 MCC713 MCC890 mcc902 4 input d flip flop FLIP FLOP RS for half adder MCC806 MCC914 MCc700 MCC900 JK flip flop half adder "J-K Flip flop" TEXT
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Abstract: setu p tim e. T h e data p asses through the array o n its w ay to th e flip -flop (Figu re 1). T h e d , th e ou tp u t to th e flip -flop will ch a n g e as d esired (Figure 2). If the setu p tim e is , extra stag e o f flip -flop m ean s an extra c lo c k d elay o f the data w h ich must b e a b so rb e d , ced , but n ot elim inated . A flip -flop can g o m etastab le if the p reced in g stage d o es not , p o ssible. CAUSES OF METASTABILITY T h e flip -flop setu p tim e is the p aram eter that is m ... OCR Scan
datasheet

3 pages,
100.74 Kb

TEXT
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Abstract: input/output D FLIP FLOP WITH RESET 1 1 O 1 DFFB - Oscillator buffers (interfacing with external , (reset) - Latch with S (set) - Latch with R - Latch with § - D Flip Flop - D Flip Flop with R (reset) - D Flip Flop with S (set) - D Flip Flop with R - D Flip Flop with S - D Flip Flop with R and S - D Flip Flop with R and S - D Flip Flop with 1 clock - JK Flip Flop - JK Flip Flop with R , tp (NOR4I (11(2) 4 10 10.5 11 ns D Flip Flop with R Prop. Delay tp (DFFR*) ... OCR Scan
datasheet

9 pages,
393.12 Kb

MA-0250 cmos 4017 MA-0800 ci hc 4020 D flip flop Matra-Harris 40 pin Matra-Harris 40 pin gate array 4556 ad PATF TTL LS 7400 Ci 4008 breadboard binary and decimal counter 1 bit full adder MATRA MHS HMT 0250-MA 0800-MA MATRA MHS HMT* 28 pins 0250-MA 0800-MA Matra-Harris 0250-MA 0800-MA Matra-Harris Semiconductor 0250-MA 0800-MA 7400 2-input nand gate 0250-MA 0800-MA RS flip flop cmos 0250-MA 0800-MA RS FLIP FLOP LAYOUT 0250-MA 0800-MA 0250-MA 0250-MA 0800-MA 0800-MA TEXT
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Abstract: D-type latch 3 (2) 93 L205 D-type latch with reset 4 (2) D-type flip flops 94 DFF D-type flip flop 6 (3) 95 DFR D-type flip flop with reset 8 (3) 96 F112 D-type flip flop with reset 7 (3) 97 F113 D-type flip flop with set 7 (3) 98 DF D-type flip flop with set/reset 9 (3) 99 F114 D-type flip flop with set/reset 8 (3) 100 F115 D-type flip flop with reset 7 (3) 101 F116 D-type flip flop with set 7 (3) 102 DF1 D-type flip flop with set/reset 8 (3) 103 F121 D-type flip flop 6 (4) 104 F125 ... OCR Scan
datasheet

23 pages,
1040.92 Kb

74381 alu 74169 binary counter 74183 4 bit multiplexer 74151 7482 full adder 74139 for bcd to excess 3 code priority encoder 74147 alu 74381 shift register 7495 counter 74169 74183 alu MH 74151 74169 SYNCHRONOUS 4-BIT BINARY COUNTER MSM70V000 MSM70V000 3-8 decoder 74138 MSM70V000 MSM70V000 synchronous counter using 4 flip flip MSM70V000 MSM70V000 Multiplexer 74152 MSM70V000 MSM70V000 counter 74168 MSM70V000 MSM70V000 MSM70V000 MSM70V000 MSM70V000 MSM-71V000 MSM72V000 MSM73V000 MSM74V000 MSM79V000 MSM75V000 MSM-76V000 MSM77V000 MSM78V000 TEXT
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Abstract: îilc l TjOao TT| a> ï DESCRIPTION - The '96 consists of five RS master/slave flip -flop s connec , and outputs to all flip -flop s are accessible, parallelin/p ara lle l-ou t o r serial-in/serial-out operation may be performed. All flip -flop s are sim ultaneously set to the LOW state by applying a low , level. Since the flip -flop s are RS master/slave cir cuits, the proper inform ation must appear at the , serial input provides this inform ation to the first flip -flop , w hile the outputs of the sub sequent ... OCR Scan
datasheet

3 pages,
144.3 Kb

ic 7496 D flip flop IC pin diagram of 7496 ic 12 V T flip flop IC RS flip flop IC T flip flop IC TEXT
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Abstract: high, the signal present at A is stored in flip flop ( A ) . When C K BA changes from low to high, the signal present at B is stored in flip flop ( B ) . Use of silicon gate technology allows the M74HC648 M74HC648 , routed from input to output or from the flip flop to output by source select inputs S AB and S Ba - The , low, the inverted signal A, which was stored in flip flop (A ) as QA when S Ab was high, appears at B , A is stored in flip flop ( A ) . When S AB is held high and when C K ab changes from low to high ... OCR Scan
datasheet

13 pages,
678.63 Kb

T flip flop IC CMOS 74LS648 T flip flop IC 648P/FP/D TEXT
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Archived Files

Abstract Saved from Date Saved File Size Type Download
The Intersil ACTS74MS ACTS74MS is a Radiation Hardened Dual D Flip Flop with Set(s) and Reset (R). The logic    Datasheet(s): Radiation Hardened Dual D Flip Flop with Set and Reset   References     ACTS74MS ACTS74MS       Rad-Hard Dual D Flip Flop with Set and Reset   Datasheet & Related Docs    CMOS Dual J-K Master-Slave Flip-Flop     HCS109MS HCS109MS   Rad-Hard Dual JK Flip Flop
/datasheets/files/intersil/device_pages/device_acts74ms.html
Intersil 07/09/2006 16.06 Kb HTML device_acts74ms.html
* * D FLIP FLOP * * .SUBCKT DFF D CLK Q QBAR + optional: DPWR=$G_DPWR DGND=$G_DGND * U1 DFF(1) + *- * * D FLIP FLOP WITH ENABLE LOW RESET * * .SUBCKT DFFR D CLK R Q QBAR *- * * D FLIP FLOP WITH ENABLE LOW PRESET AND RESET * * .SUBCKT DFFRS D CLK R S Q *- * * D FLIP FLOP WITH ENABLE LOW PRESET * * .SUBCKT DFFS D CLK S Q QBAR *- * * D FLIP FLOP WITH ENABLE HIGH RESET * * .SUBCKT DFFRH D CLK R Q QBAR
/datasheets/files/spicemodels/misc/dig_prim.lib
Spice Models 19/12/2001 40.68 Kb LIB dig_prim.lib
* * D FLIP FLOP * * .SUBCKT DFF D CLK Q QBAR + optional: DPWR=$G_DPWR DGND=$G_DGND * U1 DFF(1) + *- * * D FLIP FLOP WITH ENABLE LOW RESET * * .SUBCKT DFFR D CLK R Q QBAR *- * * D FLIP FLOP WITH ENABLE LOW PRESET AND RESET * * .SUBCKT DFFRS D CLK R S Q *- * * D FLIP FLOP WITH ENABLE LOW PRESET * * .SUBCKT DFFS D CLK S Q QBAR *- * * D FLIP FLOP WITH ENABLE HIGH RESET * * .SUBCKT DFFRH D CLK R Q QBAR
/datasheets/files/spicemodels/misc/spice_model_cd/mixed part list/spice-models-collection/dig_prim.lib
Spice Models 29/07/2012 40.67 Kb LIB dig_prim.lib
100325WFQMLV 100325WFQMLV  - Low Power Hex ECL to TTL Translator 100331WFQMLV 100331WFQMLV  - Low Power Triple D Flip Flop 100341WFQMLV 100341WFQMLV  - Low Power 8-Bit Shift Register 100351WFQMLV 100351WFQMLV  - Low Power Hex D Flip Flop  LMH6628WGQMLV LMH6628WGQMLV Dual Wideband, Low Noise, Voltage
/datasheets/files/national/index64.htm
National 27/02/2004 13.66 Kb HTM index64.htm
MC100EP131 MC100EP131 3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock Flip-Flop MC100EP52 MC100EP52 3.3V / 5V ECL Differential Data and Clock D Flip-Flop NB4L52 NB4L52 2.5 to 5.5V ECL D-Flip-flop w/Differential Reset & Input Termination MC100EP31 MC100EP31 3.3V / 5V ECL D Flip-Flop with Set Reset MC100EP35 MC100EP35 3.3V / 5V ECL JK Flip Flop MC100EP51 MC100EP51 3.3V / 5V ECL D Flip Flop Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS MC100EP142 MC100EP142 3.3V / 5V ECL
/datasheets/files/on-semiconductor/html/ds/13_datamanagement.html
On Semiconductor 28/08/2008 23.04 Kb HTML 13_datamanagement.html
/100E131 /100E131  - 4 Bit D Flip Flop   SK10/100EL16VS SK10/100EL16VS  - 5.5V Differential Receiver   SK10/100EL31W SK10/100EL31W  - D Flip Flop
/datasheets/files/semtech/html/high_performance.html
Semtech 22/03/2000 34.86 Kb HTML high_performance.html
54FCT273T 54FCT273T  Octal D Flip Flop w/Reset 54FCT2827 54FCT2827  10-Bit Buffer w/ Dual Output Enable 54FCT2841T 54FCT2841T  Octal Transparent Latch w/3-State 54FCT374T 54FCT374T  Octal D Register 54FCT377T 54FCT377T  Octal D Flip Flop w Out 74FCT257T 74FCT257T  Quad 2-Input Multiplexer w/Output Enable 74FCT273 74FCT273  Octal D Flip Flop w/Reset 74FCT273T 74FCT273T  Octal D Flip Flop w/Reset 74FCT2827 74FCT2827  10-Bit Buffer w/ Dual Output Enable 74FCT2841T 74FCT2841T 74FCT374 74FCT374  Octal D Flip-Flop 74FCT374T 74FCT374T  Octal D Register 74FCT377T 74FCT377T  Octal D Flip Flop w/Clock
/datasheets/files/idt/idtwebcd/tools/prodnumlist.html
IDT 27/04/1998 70.88 Kb HTML prodnumlist.html
ACS74MS ACS74MS   D-Flip Flop, Dual, with Set and Reset, Rad-Hard, Advanced Logic, CMOS 300 14 Ld FlatPack 14 Ld SBDIP Other ACTS74MS ACTS74MS Rad-Hard Dual D Flip Flop with Set and Reset Flip-Flop 100 16 Ld FlatPack HCS109MS HCS109MS Rad-Hard Dual JK Flip Flop 200 16
/datasheets/files/intersil/device_pages/parametric_6536.html
Intersil 17/09/2006 4.92 Kb HTML parametric_6536.html
54/74FCT273T 54/74FCT273T Logic and Interface Products 54/74FCT273T 54/74FCT273T Octal D Flip Flop with No Reset DataSheet: 2568.pdf (DataSheet 9/1/96 122KB 122KB) HSPICE Models: 74FCT273T 74FCT273T HSPICE Model ( 5/1/97 48K ) 74FCT273T 74FCT273T Typical I/O Model-for PC < Download ZIP File >  IBIS Models: 74FCT273T 74FCT273T IBIS Model (Model 11/5/97 61KB ) 74FCT273T 74FCT273T Typical I/O Model-for PC < Download Text File > 
/datasheets/files/idt/idtwebcd/products/product_files/74fct273t.html
IDT 27/04/1998 11.43 Kb HTML 74fct273t.html
54/74FCT273T 54/74FCT273T Logic and Interface Products 54/74FCT273T 54/74FCT273T Octal D Flip Flop with No Reset DataSheet: 2568.pdf (DataSheet 9/1/96 122KB 122KB) HSPICE Models: 74FCT273T 74FCT273T HSPICE Model ( 5/1/97 48K ) 74FCT273T 74FCT273T Typical I/O Model-for PC < Download ZIP File >  IBIS Models: 74FCT273T 74FCT273T IBIS Model (Model 11/5/97 61KB ) 74FCT273T 74FCT273T Typical I/O Model-for PC < Download Text File > 
/datasheets/files/idt/docs/wcd00003/wcd0032f.htm
IDT 06/10/1998 11.91 Kb HTM wcd0032f.htm