500 MILLION PARTS FROM 12000 MANUFACTURERS

DATASHEET SEARCH ENGINE

Search Stock

Shift+Click on the column header for multi-column sorting 
Part
Manufacturer
Supplier
Stock
Best Price
Price Each
Ordering
Part : BJCK77 Supplier : Thomas & Betts Manufacturer : Sager Stock : - Best Price : - Price Each : -
Shipping cost not included. Currency conversions are estimated. 

"CK 77"

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: VSSQ DQS NC VREF VSS DM CK CK CK E NC A12 A11 A9 A8 A7 A6 A5 A4 VSS Page 2 of 77 2002-04-15 , writes · Differential clock inputs (CK and CK) · Four internal banks for concurrent operation · Data mask (DM) for write data · DLL aligns DQ and DQS transitions with CK transitions · Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS · Burst Lengths: 2, 4, or 8 · , differential clock (CK and CK; the crossing of CK going HIGH and CK going LOW is referred to as the positive Infineon Technologies
Original
HYB25D256400/800/160BT 256-MB DDR200 DDR266A DDR333 TSOP66
Abstract: writes · Differential clock inputs (CK and CK) · Four internal banks for concurrent operation · Data mask (DM) for write data · DLL aligns DQ and DQS transitions with CK transitions · Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS · Burst Lengths: 2, 4, or 8 · , SDRAM operates from a differential clock (CK and CK; the crossing of CK going HIGH and CK going LOW is referred to as the positive edge of CK). Commands (address and control signals) are registered at every Infineon Technologies
Original
HYB25D512400 HYB25D512400/800/160AT 512-MB JC-42 512-M SCR-004-2001-08-01
Abstract: Specific Row in a Specific Bank CK CK CKE HIGH CS RAS CAS WE A0-A12 BA0, BA1 Page 19 of 77 , center-aligned with data for writes â'¢ Differential clock inputs (CK and CK) â'¢ Four internal banks for concurrent operation â'¢ Data mask (DM) for write data â'¢ DLL aligns DQ and DQS transitions with CK transitions â'¢ Commands entered on each positive CK edge; data and data mask referenced to both edges of , center-aligned with data for Writes. The 256Mb DDR SDRAM operates from a differential clock (CK and CK; the Infineon Technologies
Original
DDR266F
Abstract: DQ2 VDDQ NC NC VSSQ DQS NC VREF VSS DM CK CK CKE NC A12 A11 A9 A8 A7 A6 A5 A4 V SS Page 2 of 77 , writes · Differential clock inputs (CK and CK) · Four internal banks for concurrent operation · Data mask (DM) for write data · DLL aligns DQ and DQS transitions with CK transitions · Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS · Burst Lengths: 2, 4, or 8 · , center-aligned with data for Writes. The 512Mb DDR SDRAM operates from a differential clock (CK and CK; the Infineon Technologies
Original
Abstract: CK CK CKE HIGH CS RAS CAS WE A0-A12 BA0, BA1 Page 18 of 77 RA BA RA = row , center-aligned with data for writes · Differential clock inputs (CK and CK) · Four internal banks for concurrent operation · Data mask (DM) for write data · DLL aligns DQ and DQS transitions with CK transitions · Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS , differential clock (CK and CK; the crossing of CK going HIGH and CK going LOW is referred to as the positive Infineon Technologies
Original
HYB25D512400AT
Abstract: CK CKE NC A12 A11 A9 A8 A7 A6 A5 A4 VSS Page 3 of 77 V0.91, 2002-11-14 HYB25D512400/800 , writes · Differential clock inputs (CK and CK) · Four internal banks for concurrent operation · Data mask (DM) for write data · DLL aligns DQ and DQS transitions with CK transitions · Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS · Burst Lengths: 2, 4, or 8 · , SDRAM operates from a differential clock (CK and CK; the crossing of CK going HIGH and CK going LOW is Infineon Technologies
Original
HYB25D512800AT TSOP-66
Abstract: data for reads and is center-aligned with data for writes · Differential clock inputs (CK and CK) · , DQS transitions with CK transitions · Commands entered on each positive CK edge; data and data mask , center-aligned with data for Writes. The 256Mb DDR SDRAM operates from a differential clock (CK and CK; the crossing of CK going HIGH and CK going LOW is referred to as the positive edge of CK). Commands (address and control signals) are registered at every positive edge of CK. Input data is registered on both Infineon Technologies
Original
HYB25D256 DDR266 DDR400 infineon HYB25D256400BT HYB25D256800BT P-FBGA 169 256-M
Abstract: . All other conditions sea level : 1000 , 70 000 feet : 325. C&K QPL listed components : D*MA , : â'¢ For any part number different from those listed above, please consult your local C&K , Type Connectors D*M Solder bucket - MIL Designation and C&K Part Numbers Fixing Option Standard Float Mount (Y) MIL Designation C&K Part Number MIL Designation 9P C115372 , C&K Part Number C115372-2009B M24308/5-38 C115372-2059B M24308/5-60 Connectors D*M for C&K Components
Original
CK 77 94V-0 4 pin CK 77- 94V-0 MIL-DTL-24308 90 PCB MOUNT DTL-24308 A14-13 02JUN14
Abstract: Intra-Pair Skew CK Skew < 0.15*Tbit; 0.011*Tbit Pass 10 7-7: Source Intra-Pair Skew D0 , silicon passes CTS 7-6, 7-7, 7-8, 7-9, 7-10 at 1080p 24bit, and CTS 7-2, 7-7 at 480p. Measurements shown , Test results Table 9. CTS7-2, 7-7 at 480p 60 Hz Index Test Name Lanes Measured Value Spec Range Result 1 7-2: Source Low Amplitude +(Supported Sink , < VL < 2.900V; 2.7475V Pass 3 7-2: Source Low Amplitude -(Supported Sink Freescale Semiconductor
Original
AN4671 MSO72004C P7313SMA P40A-1P2J
Abstract: °C 1 Price Each 25 100 C&K Part No. Lenses .90 .71 5.49257.0111002 1.12 .90 , CKN9378-ND .96 .77 .61 5.49275.0361002 Square, Red, for LED CKN9219-ND .96 .77 .61 5.49275.0361301 Square, Red, for Filament Lamp CKN9379-ND .96 .77 .61 5.49275.0361303 Square, Yellow, for Filament or LED CKN9220-ND .96 .77 .61 5.49275.0361402 Square, Green, for Filament Lamp CKN9380-ND .96 .77 .61 5.49275.0361502 Square, Green, for LED -
Original
CKN9386-ND CKN9233-ND CKN9234-ND CKN9235-ND CKN9377-ND CKN9215-ND LED superbright CKN9272-ND CKN9376-ND
Abstract: H L Toggle H H T L H Qo Qo H H T H H H L H H L X X Qo Qo :LR [T^ ij ii< [J l CK I PR [~5~ iq[T ,o(T. :,NO |"7T" J CK * PR CLR Q Q CLR PR 8 « Vcc 2CLR 3 "77] a 77] 2K TT] 2C 77 , â'" 4mA - - 0.4 Input current J, K, CK Il H Vcc = 5.25 V, Vi = 2.7V - - 20 M CLR, PR - - 40 J, K, CK Il L Vcc = 5.25 V, V/ â'" 0. 4V - - -0.4 mA CLR, PR - - -0.8 J, K, CK h Vcc = 5.25 , ) Test Circuit _ 1.1) Ami, tPLH, tPHL (CIOCk-»Q,Q) Vcc Output Q P.C. ZoufSOS X PR >CK 9 CLR -
OCR Scan
HD74LS109A 74LSOO 1S2074 HD74LS109 GG14T13 QQ14CI14 DG-14 20-IU8
Abstract: fg.c om 48" 48" 48" 48" 48" 48" 70" 70" 70" 70" 77" 77" 48" 48" 48" 48" 48" 48" 70" 70" 70" 70" 77" 77" Electr ical Shipping Rating We i g h t 1 2 0 VAC/ 1 5 A 3.5 l bs , Twi s t L o ck Twi s t L o ck St rai ght St rai ght Twi s t L o ck Twi s t L o ck St rai ght St rai ght Twi s t L o ck Twi s t L o ck St rai ght St rai ght Twi s t L o ck Twi s t L o ck St rai ght St rai ght Twi s t L o ck Twi s t L o ck St rai ght St rai ght Twi s t L o ck Twi s t L Hammond Manufacturing
Original
ASA61 1413GFS 1413LRS 1413NS PKT66 PKT99
Abstract: logic level. Presetting of each IC is synchronous to the rising edge o f CK. The clear function of the TC 74A C T163 is synchronous to CK, while the TC74ACT161 is cleared asynchronously. T w o enable , Available in 16-pin DIP and 150 mil SOIC Pin Assignment CLR CK A B C D ENP GND 2L 4n 5c 7c 1 : 3 : 6 , CT=0 M1 M2 ENT ENP CK (10) (n (2) G3 G4 C 5 /2 .3 .4 + 1 , 5 D (1 ) w 1 TC74ACT163 CLR LOAD (15) CARRY OUTPUT (D h CTRDIV16 5C T=0 M1 M2 ENT ENP CK ( *2 3 C r= 1 5 (10) (/> 3C T=15 G3 -
OCR Scan
t163 TC74ACT161/163 TC74AC161
Abstract: SURFACE MOUNT ALUMINUM ELECTROLYTIC CAPACITORS CK Chip type, Low Impedance, High CV Series , Unit : mm Resistance to soldering heat DRAWING 6.3 8 6.2) -Series code of CK is "K" ØD 6.3 6.3 8 8 10 12.5 L 5.8 7.7 6.2 10 10 13.5 A B C 2.4 6.6 6.6 2.4 6.6 6.6 3.3 8.3 8.3 2.9 8.3 8.3 , CAPACITORS CK series DIMENSIONS & MAXIMUM PERMISSIBLE RIPPLE CURRENT F 10 15 22 WV 6.3 10 16 25 35 50 6.3 5.8 0.88 165 6.3 5.8 0.88 165 6.3 5.8 0.88 165 6.3 7.7 0.68 280 33 6.3 5.8 0.44 230 6.3 5.8 0.44 SAMWHA
Original
Abstract: ­ 20 MHz DC ­ 200 ns · 8K x 14 ROM 368 x 8 RAM · PIC16F73/74/76/77 · PIC16F873/874/876 , RB6 RB5 RB4 RB3 RB2 RB1 RB0/INT VDD VSS RC7/RX/DT RC6/TX/CK RC5/SDO RC4/SDI/SDA 1 2 3 , /SCK/SCL RC4/SDI/SDA RC5/SDO RC6/TX/CK RA2/AN2 RA3/AN3/VREF RA4/T0CKI RA5/AN4/SS VSS OSC1 , RB3 RB2 RB1 RB0/INT VDD VSS RD7/PSP7 RD6/PSP6 RD5/PSP5 RD4/PSP4 RC7/RX/DT RC6/TX/CK RC5 , /PSP3 RC4/SDI/SDA RC5/SDO RC6/TX/CK NC RA4/T0CKI RA5/AN4/SS RE0/AN5/RD RE1/AN6/WR RE2/AN7/CS Microchip Technology
Original
PIC16CR7X pic16F73 PIC16CR73 pic16F7X PIC16CR77 PIC16CR76 DS21993B ISO/TS-16949 ISO/TS16949
Abstract: 200 ns · 8K x 14 ROM , 368 x 8 (RAM) · PIC16F73/74/76/77 · PIC16F873/874/876/877 , /INT VDD VSS RC7/RX/DT RC6/TX/CK RC5/SDO RC4/SDI/SDA 1 2 3 4 5 6 7 28 27 26 25 24 23 , /CK RA2/AN2 RA3/AN3/VREF RA4/T0CKI RA5/AN4/SS VSS OSC1/CLKIN OSC2/CLKOUT RA1/AN1 RA0/AN0 , RD6/PSP6 RD5/PSP5 RD4/PSP4 RC7/RX/DT RC6/TX/CK RC5/SDO RC4/SDI/SDA RD3/PSP3 RD2/PSP2 2006 , /PSP0 RD1/PSP1 RD2/PSP2 RD3/PSP3 RC4/SDI/SDA RC5/SDO RC6/TX/CK NC RA4/T0CKI RA5/AN4/SS RE0 Intel
Original
ds33023 usart C18 CODE PIC16CR74 Pcl 722 PIC18 example usart ssp 1612 DS21993A
Abstract: SURFACE MOUNT ALUMINUM ELECTROLYTIC CAPACITORS CK Chip type, Low Impedance, High CV Series , -Series code of CK is â'Kâ' 6.2) D B C E R 5.8 2.4 6.6 6.6 2.2 0.5~0.8 6.3 7.7 2.4 6.6 6.6 2.2 0.5~0.8 8 6.2 3.3 8.3 8.3 2.3 , Resistance to soldering heat SURFACE MOUNT ALUMINUM ELECTROLYTIC CAPACITORS CK series DIMENSIONS , 5.8 0.88 165 15 6.3 5.8 0.88 165 22 6.3 5.8 0.88 165 6.3 7.7 SAMWHA
Original
Abstract: . MH8S72DBFD-7.-8 6 0 3 ,9 7 9 ,77 6-B IT ( 8,388,608-W Q R D BY 72-BIT ) Synchronous DYNAMIC RAM , change w ith o u t notice. MH8S72DBFD-7.-8 6 0 3 ,9 7 9 ,77 6-B IT ( 8,388,608-W Q R D BY 72 , ? 35 A4 77 nosi 119 A5 161 n063 36 A6 78 VSS 120 A7 1 6 , notice. MH8S72DBFD-7,-8 6 0 3 ,9 7 9 ,77 6-B IT ( 8,388,608-W Q R D BY 72-BIT ) Synchronous DYNAMIC , u t notice. MH8S72DBFD-7.-8 6 0 3 ,9 7 9 ,77 6-B IT ( 8,388,608-W Q R D BY 72-BIT ) Synchronous -
OCR Scan
MH8S72DBFD 4838533732444246442D 4838533732444246442D38202020202020 MIT-DS-0351
Abstract: T -77-Z I ELECTRONIC VOLUME LSI FOR 7-BAND GRAPHIC EQUALIZER. TC9187AN/AF is a system LSI, in , [ 3 cL 3 DATA ST C qîjdC T C 9 1 8 7 AF / « n ( s c ) c 348 N 3 CK H D , VDD 15 3 V rin 37 ONDC 38 (VDD) C 39 CK C 40 DATAC 41 ÃLC 4? (N C)C 43 (TO P VIEW ) ' , D T- 77 - 2 1 ST (37) â  z ) -(S- Lch " 0 O ( : TC9187AH (1 8 ) Vgg , , No Load - 1.0 3.0 - V DD=12V, V Sg=GND=0V A.O ~ VDD - CK,DATA,ST,F,R,CL -
OCR Scan
TC9187AF TC9187AN FP-44 TDT7B47 022/F
Abstract: 67 68 69 70 71 72 73 74 75 76 77 78 79 80 GND VDD (+5V) NC 64 63 62 61 , TRNCLK NC RCVRDY RCVCLK 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 , O CK I GND â'" NC â'" OUT2 O GATE2 I CLK2 I OUT1 O GATE1 I CLK1 I OUT0 O , 77 75 GATE 2 OUT2 74 2 CLK 0 79 CLK 1 76 CLK 2 15 W 16 R 65 RST 71 CK A0, A1 C00-C02 CLK0-CLK2 CK CS0-CS4 CTS DB0-DB7 DSR DTR GATE0-GATE2 INT0 -
Original
MB89394-PF IRQ17 IRQ16 IRQ15 IRQ14 IRQ13
Showing first 20 results.